]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: mediatek: mt7988: Add lvts node
authorFrank Wunderlich <frank-w@public-files.de>
Tue, 17 Dec 2024 09:12:17 +0000 (10:12 +0100)
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tue, 7 Jan 2025 12:11:45 +0000 (13:11 +0100)
Add Low Voltage Thermal Sensor (LVTS) node for mt7988 SoC.

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20241217091238.16032-4-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
arch/arm64/boot/dts/mediatek/mt7988a.dtsi

index 2e224d0d01687b7afe5c4acb2a7fe7d2571b061d..32bb04ce21b3d494de070ca9e8f97220f1620105 100644 (file)
@@ -4,6 +4,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/phy/phy.h>
 #include <dt-bindings/pinctrl/mt65xx.h>
+#include <dt-bindings/reset/mediatek,mt7988-resets.h>
 
 / {
        compatible = "mediatek,mt7988a";
@@ -97,6 +98,7 @@
                        compatible = "mediatek,mt7988-infracfg", "syscon";
                        reg = <0 0x10001000 0 0x1000>;
                        #clock-cells = <1>;
+                       #reset-cells = <1>;
                };
 
                topckgen: clock-controller@1001b000 {
                        status = "disabled";
                };
 
+               lvts: lvts@1100a000 {
+                       compatible = "mediatek,mt7988-lvts-ap";
+                       #thermal-sensor-cells = <1>;
+                       reg = <0 0x1100a000 0 0x1000>;
+                       clocks = <&infracfg CLK_INFRA_26M_THERM_SYSTEM>;
+                       interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&infracfg MT7988_INFRA_RST1_THERM_CTRL_SWRST>;
+                       nvmem-cells = <&lvts_calibration>;
+                       nvmem-cell-names = "lvts-calib-data-1";
+               };
+
                usb@11190000 {
                        compatible = "mediatek,mt7988-xhci", "mediatek,mtk-xhci";
                        reg = <0 0x11190000 0 0x2e00>,
                        reg = <0 0x11f50000 0 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <1>;
+
+                       lvts_calibration: calib@918 {
+                               reg = <0x918 0x28>;
+                       };
                };
 
                clock-controller@15000000 {