--- /dev/null
+From 01bad2f84c334a3dad3016714545e8d76f0aa42b Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 8 Mar 2023 19:33:53 +0530
+Subject: drm/amdgpu/soc21: Add video cap query support for VCN_4_0_4
+
+From: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
+
+[ Upstream commit 6ce2ea07c5ff0a8188eab0e5cd1f0e4899b36835 ]
+
+Added the video capability query support for VCN version 4_0_4
+
+Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
+Reviewed-by: Leo Liu <leo.liu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Cc: stable@vger.kernel.org # 6.1.x
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/amd/amdgpu/soc21.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c
+index e51a7bdb1eb75..3d938b52178e3 100644
+--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
+@@ -110,6 +110,7 @@ static int soc21_query_video_codecs(struct amdgpu_device *adev, bool encode,
+ switch (adev->ip_versions[UVD_HWIP][0]) {
+ case IP_VERSION(4, 0, 0):
+ case IP_VERSION(4, 0, 2):
++ case IP_VERSION(4, 0, 4):
+ if (adev->vcn.harvest_config & AMDGPU_VCN_HARVEST_VCN0) {
+ if (encode)
+ *codecs = &vcn_4_0_0_video_codecs_encode_vcn1;
+--
+2.39.2
+
--- /dev/null
+From 74bce5d93a3736019acad1612615da1777fa6050 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Fri, 13 Jan 2023 10:45:59 -0500
+Subject: drm/amdgpu/soc21: don't expose AV1 if VCN0 is harvested
+
+From: Alex Deucher <alexander.deucher@amd.com>
+
+[ Upstream commit a6de636eb04f146d23644dbbb7173e142452a9b7 ]
+
+Only VCN0 supports AV1.
+
+Reviewed-by: Leo Liu <leo.liu@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Stable-dep-of: 6ce2ea07c5ff ("drm/amdgpu/soc21: Add video cap query support for VCN_4_0_4")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/gpu/drm/amd/amdgpu/soc21.c | 61 +++++++++++++++++++++++-------
+ 1 file changed, 48 insertions(+), 13 deletions(-)
+
+diff --git a/drivers/gpu/drm/amd/amdgpu/soc21.c b/drivers/gpu/drm/amd/amdgpu/soc21.c
+index 4f9cf58c37cdb..e51a7bdb1eb75 100644
+--- a/drivers/gpu/drm/amd/amdgpu/soc21.c
++++ b/drivers/gpu/drm/amd/amdgpu/soc21.c
+@@ -48,19 +48,31 @@
+ static const struct amd_ip_funcs soc21_common_ip_funcs;
+
+ /* SOC21 */
+-static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_encode_array[] =
++static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_encode_array_vcn0[] =
+ {
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},
+ };
+
+-static const struct amdgpu_video_codecs vcn_4_0_0_video_codecs_encode =
++static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_encode_array_vcn1[] =
+ {
+- .codec_count = ARRAY_SIZE(vcn_4_0_0_video_codecs_encode_array),
+- .codec_array = vcn_4_0_0_video_codecs_encode_array,
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 2304, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 4096, 2304, 0)},
++};
++
++static const struct amdgpu_video_codecs vcn_4_0_0_video_codecs_encode_vcn0 =
++{
++ .codec_count = ARRAY_SIZE(vcn_4_0_0_video_codecs_encode_array_vcn0),
++ .codec_array = vcn_4_0_0_video_codecs_encode_array_vcn0,
+ };
+
+-static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_decode_array[] =
++static const struct amdgpu_video_codecs vcn_4_0_0_video_codecs_encode_vcn1 =
++{
++ .codec_count = ARRAY_SIZE(vcn_4_0_0_video_codecs_encode_array_vcn1),
++ .codec_array = vcn_4_0_0_video_codecs_encode_array_vcn1,
++};
++
++static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_decode_array_vcn0[] =
+ {
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)},
+@@ -69,23 +81,46 @@ static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_decode_array[
+ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_AV1, 8192, 4352, 0)},
+ };
+
+-static const struct amdgpu_video_codecs vcn_4_0_0_video_codecs_decode =
++static const struct amdgpu_video_codec_info vcn_4_0_0_video_codecs_decode_array_vcn1[] =
++{
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_MPEG4_AVC, 4096, 4096, 52)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_HEVC, 8192, 4352, 186)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_JPEG, 4096, 4096, 0)},
++ {codec_info_build(AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_VP9, 8192, 4352, 0)},
++};
++
++static const struct amdgpu_video_codecs vcn_4_0_0_video_codecs_decode_vcn0 =
+ {
+- .codec_count = ARRAY_SIZE(vcn_4_0_0_video_codecs_decode_array),
+- .codec_array = vcn_4_0_0_video_codecs_decode_array,
++ .codec_count = ARRAY_SIZE(vcn_4_0_0_video_codecs_decode_array_vcn0),
++ .codec_array = vcn_4_0_0_video_codecs_decode_array_vcn0,
++};
++
++static const struct amdgpu_video_codecs vcn_4_0_0_video_codecs_decode_vcn1 =
++{
++ .codec_count = ARRAY_SIZE(vcn_4_0_0_video_codecs_decode_array_vcn1),
++ .codec_array = vcn_4_0_0_video_codecs_decode_array_vcn1,
+ };
+
+ static int soc21_query_video_codecs(struct amdgpu_device *adev, bool encode,
+ const struct amdgpu_video_codecs **codecs)
+ {
+- switch (adev->ip_versions[UVD_HWIP][0]) {
++ if (adev->vcn.num_vcn_inst == hweight8(adev->vcn.harvest_config))
++ return -EINVAL;
+
++ switch (adev->ip_versions[UVD_HWIP][0]) {
+ case IP_VERSION(4, 0, 0):
+ case IP_VERSION(4, 0, 2):
+- if (encode)
+- *codecs = &vcn_4_0_0_video_codecs_encode;
+- else
+- *codecs = &vcn_4_0_0_video_codecs_decode;
++ if (adev->vcn.harvest_config & AMDGPU_VCN_HARVEST_VCN0) {
++ if (encode)
++ *codecs = &vcn_4_0_0_video_codecs_encode_vcn1;
++ else
++ *codecs = &vcn_4_0_0_video_codecs_decode_vcn1;
++ } else {
++ if (encode)
++ *codecs = &vcn_4_0_0_video_codecs_encode_vcn0;
++ else
++ *codecs = &vcn_4_0_0_video_codecs_decode_vcn0;
++ }
+ return 0;
+ default:
+ return -EINVAL;
+--
+2.39.2
+
--- /dev/null
+From 03173bbcd46917e64c4e655d4e1b6bf9f9039a8a Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 5 Dec 2022 14:45:24 +0000
+Subject: RISC-V: clarify ISA string ordering rules in cpu.c
+
+From: Conor Dooley <conor.dooley@microchip.com>
+
+[ Upstream commit 99e2266f2460e5778560f81982b6301dd2a16502 ]
+
+While the current list of rules may have been accurate when created
+it now lacks some clarity in the face of isa-manual updates. Instead of
+trying to continuously align this rule-set with the one in the
+specifications, change the role of this comment.
+
+This particular comment is important, as the array it "decorates"
+defines the order in which the ISA string appears to userspace in
+/proc/cpuinfo.
+
+Re-jig and strengthen the wording to provide contributors with a set
+order in which to add entries & note why this particular struct needs
+more attention than others.
+
+While in the area, add some whitespace and tweak some wording for
+readability's sake.
+
+Suggested-by: Andrew Jones <ajones@ventanamicro.com>
+Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
+Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
+Link: https://lore.kernel.org/r/20221205144525.2148448-2-conor.dooley@microchip.com
+Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
+Stable-dep-of: 1eac28201ac0 ("RISC-V: fix ordering of Zbb extension")
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/riscv/kernel/cpu.c | 49 ++++++++++++++++++++++++++++++-----------
+ 1 file changed, 36 insertions(+), 13 deletions(-)
+
+diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
+index 1b9a5a66e55ab..db8b16ad9342b 100644
+--- a/arch/riscv/kernel/cpu.c
++++ b/arch/riscv/kernel/cpu.c
+@@ -144,22 +144,45 @@ arch_initcall(riscv_cpuinfo_init);
+ .uprop = #UPROP, \
+ .isa_ext_id = EXTID, \
+ }
++
+ /*
+- * Here are the ordering rules of extension naming defined by RISC-V
+- * specification :
+- * 1. All extensions should be separated from other multi-letter extensions
+- * by an underscore.
+- * 2. The first letter following the 'Z' conventionally indicates the most
++ * The canonical order of ISA extension names in the ISA string is defined in
++ * chapter 27 of the unprivileged specification.
++ *
++ * Ordinarily, for in-kernel data structures, this order is unimportant but
++ * isa_ext_arr defines the order of the ISA string in /proc/cpuinfo.
++ *
++ * The specification uses vague wording, such as should, when it comes to
++ * ordering, so for our purposes the following rules apply:
++ *
++ * 1. All multi-letter extensions must be separated from other extensions by an
++ * underscore.
++ *
++ * 2. Additional standard extensions (starting with 'Z') must be sorted after
++ * single-letter extensions and before any higher-privileged extensions.
++
++ * 3. The first letter following the 'Z' conventionally indicates the most
+ * closely related alphabetical extension category, IMAFDQLCBKJTPVH.
+- * If multiple 'Z' extensions are named, they should be ordered first
+- * by category, then alphabetically within a category.
+- * 3. Standard supervisor-level extensions (starts with 'S') should be
+- * listed after standard unprivileged extensions. If multiple
+- * supervisor-level extensions are listed, they should be ordered
++ * If multiple 'Z' extensions are named, they must be ordered first by
++ * category, then alphabetically within a category.
++ *
++ * 3. Standard supervisor-level extensions (starting with 'S') must be listed
++ * after standard unprivileged extensions. If multiple supervisor-level
++ * extensions are listed, they must be ordered alphabetically.
++ *
++ * 4. Standard machine-level extensions (starting with 'Zxm') must be listed
++ * after any lower-privileged, standard extensions. If multiple
++ * machine-level extensions are listed, they must be ordered
+ * alphabetically.
+- * 4. Non-standard extensions (starts with 'X') must be listed after all
+- * standard extensions. They must be separated from other multi-letter
+- * extensions by an underscore.
++ *
++ * 5. Non-standard extensions (starting with 'X') must be listed after all
++ * standard extensions. If multiple non-standard extensions are listed, they
++ * must be ordered alphabetically.
++ *
++ * An example string following the order is:
++ * rv64imadc_zifoo_zigoo_zafoo_sbar_scar_zxmbaz_xqux_xrux
++ *
++ * New entries to this struct should follow the ordering rules described above.
+ */
+ static struct riscv_isa_ext_data isa_ext_arr[] = {
+ __RISCV_ISA_EXT_DATA(sscofpmf, RISCV_ISA_EXT_SSCOFPMF),
+--
+2.39.2
+
--- /dev/null
+From cdb68604f94eb8323964cc8cece2b292d520c1fe Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Mon, 13 Mar 2023 11:43:48 -0400
+Subject: RISC-V: take text_mutex during alternative patching
+
+[ Upstream commit 9493e6f3ce02f44c21aa19f3cbf3b9aa05479d06 ]
+
+Guenter reported a splat during boot, that Samuel pointed out was the
+lockdep assertion failing in patch_insn_write():
+
+WARNING: CPU: 0 PID: 0 at arch/riscv/kernel/patch.c:63 patch_insn_write+0x222/0x2f6
+epc : patch_insn_write+0x222/0x2f6
+ ra : patch_insn_write+0x21e/0x2f6
+epc : ffffffff800068c6 ra : ffffffff800068c2 sp : ffffffff81803df0
+ gp : ffffffff81a1ab78 tp : ffffffff81814f80 t0 : ffffffffffffe000
+ t1 : 0000000000000001 t2 : 4c45203a76637369 s0 : ffffffff81803e40
+ s1 : 0000000000000004 a0 : 0000000000000000 a1 : ffffffffffffffff
+ a2 : 0000000000000004 a3 : 0000000000000000 a4 : 0000000000000001
+ a5 : 0000000000000000 a6 : 0000000000000000 a7 : 0000000052464e43
+ s2 : ffffffff80b4889c s3 : 000000000000082c s4 : ffffffff80b48828
+ s5 : 0000000000000828 s6 : ffffffff8131a0a0 s7 : 0000000000000fff
+ s8 : 0000000008000200 s9 : ffffffff8131a520 s10: 0000000000000018
+ s11: 000000000000000b t3 : 0000000000000001 t4 : 000000000000000d
+ t5 : ffffffffd8180000 t6 : ffffffff81803bc8
+status: 0000000200000100 badaddr: 0000000000000000 cause: 0000000000000003
+[<ffffffff800068c6>] patch_insn_write+0x222/0x2f6
+[<ffffffff80006a36>] patch_text_nosync+0xc/0x2a
+[<ffffffff80003b86>] riscv_cpufeature_patch_func+0x52/0x98
+[<ffffffff80003348>] _apply_alternatives+0x46/0x86
+[<ffffffff80c02d36>] apply_boot_alternatives+0x3c/0xfa
+[<ffffffff80c03ad8>] setup_arch+0x584/0x5b8
+[<ffffffff80c0075a>] start_kernel+0xa2/0x8f8
+
+This issue was exposed by 702e64550b12 ("riscv: fpu: switch has_fpu() to
+riscv_has_extension_likely()"), as it is the patching in has_fpu() that
+triggers the splats in Guenter's report.
+
+Take the text_mutex before doing any code patching to satisfy lockdep.
+
+Fixes: ff689fd21cb1 ("riscv: add RISC-V Svpbmt extension support")
+Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
+Fixes: 1a0e5dbd3723 ("riscv: sifive: Add SiFive alternative ports")
+Reported-by: Guenter Roeck <linux@roeck-us.net>
+Link: https://lore.kernel.org/all/20230212154333.GA3760469@roeck-us.net/
+Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
+Reviewed-by: Samuel Holland <samuel@sholland.org>
+Tested-by: Guenter Roeck <linux@roeck-us.net>
+Link: https://lore.kernel.org/r/20230212194735.491785-1-conor@kernel.org
+Cc: stable@vger.kernel.org
+Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ arch/riscv/errata/sifive/errata.c | 3 +++
+ arch/riscv/errata/thead/errata.c | 8 ++++++--
+ arch/riscv/kernel/cpufeature.c | 6 +++++-
+ 3 files changed, 14 insertions(+), 3 deletions(-)
+
+diff --git a/arch/riscv/errata/sifive/errata.c b/arch/riscv/errata/sifive/errata.c
+index 1031038423e74..5b77d7310e391 100644
+--- a/arch/riscv/errata/sifive/errata.c
++++ b/arch/riscv/errata/sifive/errata.c
+@@ -4,6 +4,7 @@
+ */
+
+ #include <linux/kernel.h>
++#include <linux/memory.h>
+ #include <linux/module.h>
+ #include <linux/string.h>
+ #include <linux/bug.h>
+@@ -107,7 +108,9 @@ void __init_or_module sifive_errata_patch_func(struct alt_entry *begin,
+
+ tmp = (1U << alt->errata_id);
+ if (cpu_req_errata & tmp) {
++ mutex_lock(&text_mutex);
+ patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len);
++ mutex_lock(&text_mutex);
+ cpu_apply_errata |= tmp;
+ }
+ }
+diff --git a/arch/riscv/errata/thead/errata.c b/arch/riscv/errata/thead/errata.c
+index fac5742d1c1e6..9d71fe3d35c77 100644
+--- a/arch/riscv/errata/thead/errata.c
++++ b/arch/riscv/errata/thead/errata.c
+@@ -5,6 +5,7 @@
+
+ #include <linux/bug.h>
+ #include <linux/kernel.h>
++#include <linux/memory.h>
+ #include <linux/module.h>
+ #include <linux/string.h>
+ #include <linux/uaccess.h>
+@@ -97,11 +98,14 @@ void __init_or_module thead_errata_patch_func(struct alt_entry *begin, struct al
+ tmp = (1U << alt->errata_id);
+ if (cpu_req_errata & tmp) {
+ /* On vm-alternatives, the mmu isn't running yet */
+- if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
++ if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) {
+ memcpy((void *)__pa_symbol(alt->old_ptr),
+ (void *)__pa_symbol(alt->alt_ptr), alt->alt_len);
+- else
++ } else {
++ mutex_lock(&text_mutex);
+ patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len);
++ mutex_unlock(&text_mutex);
++ }
+ }
+ }
+
+diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
+index 93e45560af307..5a82d5520a1fd 100644
+--- a/arch/riscv/kernel/cpufeature.c
++++ b/arch/riscv/kernel/cpufeature.c
+@@ -10,6 +10,7 @@
+ #include <linux/ctype.h>
+ #include <linux/libfdt.h>
+ #include <linux/log2.h>
++#include <linux/memory.h>
+ #include <linux/module.h>
+ #include <linux/of.h>
+ #include <asm/alternative.h>
+@@ -339,8 +340,11 @@ void __init_or_module riscv_cpufeature_patch_func(struct alt_entry *begin,
+ }
+
+ tmp = (1U << alt->errata_id);
+- if (cpu_req_feature & tmp)
++ if (cpu_req_feature & tmp) {
++ mutex_lock(&text_mutex);
+ patch_text_nosync(alt->old_ptr, alt->alt_ptr, alt->alt_len);
++ mutex_unlock(&text_mutex);
++ }
+ }
+ }
+ #endif
+--
+2.39.2
+
risc-v-don-t-check-text_mutex-during-stop_machine.patch
drm-amdgpu-fix-return-value-check-in-kfd.patch
ext4-fix-deadlock-during-directory-rename.patch
+risc-v-clarify-isa-string-ordering-rules-in-cpu.c.patch
+risc-v-take-text_mutex-during-alternative-patching.patch
+drm-amdgpu-soc21-don-t-expose-av1-if-vcn0-is-harvest.patch
+drm-amdgpu-soc21-add-video-cap-query-support-for-vcn.patch
+watch_queue-fix-ioc_watch_queue_set_size-alloc-error.patch
+tpm-eventlog-don-t-abort-tpm_read_log-on-faulty-acpi.patch
--- /dev/null
+From 2d3e7d6840db7690259158a12ba1cd93e03e6e3f Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 15 Feb 2023 10:25:52 +0100
+Subject: tpm/eventlog: Don't abort tpm_read_log on faulty ACPI address
+
+From: Morten Linderud <morten@linderud.pw>
+
+[ Upstream commit 80a6c216b16d7f5c584d2148c2e4345ea4eb06ce ]
+
+tpm_read_log_acpi() should return -ENODEV when no eventlog from the ACPI
+table is found. If the firmware vendor includes an invalid log address
+we are unable to map from the ACPI memory and tpm_read_log() returns -EIO
+which would abort discovery of the eventlog.
+
+Change the return value from -EIO to -ENODEV when acpi_os_map_iomem()
+fails to map the event log.
+
+The following hardware was used to test this issue:
+ Framework Laptop (Pre-production)
+ BIOS: INSYDE Corp, Revision: 3.2
+ TPM Device: NTC, Firmware Revision: 7.2
+
+Dump of the faulty ACPI TPM2 table:
+ [000h 0000 4] Signature : "TPM2" [Trusted Platform Module hardware interface Table]
+ [004h 0004 4] Table Length : 0000004C
+ [008h 0008 1] Revision : 04
+ [009h 0009 1] Checksum : 2B
+ [00Ah 0010 6] Oem ID : "INSYDE"
+ [010h 0016 8] Oem Table ID : "TGL-ULT"
+ [018h 0024 4] Oem Revision : 00000002
+ [01Ch 0028 4] Asl Compiler ID : "ACPI"
+ [020h 0032 4] Asl Compiler Revision : 00040000
+
+ [024h 0036 2] Platform Class : 0000
+ [026h 0038 2] Reserved : 0000
+ [028h 0040 8] Control Address : 0000000000000000
+ [030h 0048 4] Start Method : 06 [Memory Mapped I/O]
+
+ [034h 0052 12] Method Parameters : 00 00 00 00 00 00 00 00 00 00 00 00
+ [040h 0064 4] Minimum Log Length : 00010000
+ [044h 0068 8] Log Address : 000000004053D000
+
+Fixes: 0cf577a03f21 ("tpm: Fix handling of missing event log")
+Tested-by: Erkki Eilonen <erkki@bearmetal.eu>
+Signed-off-by: Morten Linderud <morten@linderud.pw>
+Reviewed-by: Jarkko Sakkinen <jarkko@kernel.org>
+Signed-off-by: Jarkko Sakkinen <jarkko@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/char/tpm/eventlog/acpi.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/char/tpm/eventlog/acpi.c b/drivers/char/tpm/eventlog/acpi.c
+index 0913d3eb8d518..cd266021d0103 100644
+--- a/drivers/char/tpm/eventlog/acpi.c
++++ b/drivers/char/tpm/eventlog/acpi.c
+@@ -143,8 +143,12 @@ int tpm_read_log_acpi(struct tpm_chip *chip)
+
+ ret = -EIO;
+ virt = acpi_os_map_iomem(start, len);
+- if (!virt)
++ if (!virt) {
++ dev_warn(&chip->dev, "%s: Failed to map ACPI memory\n", __func__);
++ /* try EFI log next */
++ ret = -ENODEV;
+ goto err;
++ }
+
+ memcpy_fromio(log->bios_event_log, virt, len);
+
+--
+2.39.2
+
--- /dev/null
+From 6f204b78190319d16b4f38d51e5130c7c90254f8 Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 7 Mar 2023 16:21:06 +0100
+Subject: watch_queue: fix IOC_WATCH_QUEUE_SET_SIZE alloc error paths
+
+From: David Disseldorp <ddiss@suse.de>
+
+[ Upstream commit 03e1d60e177eedbd302b77af4ea5e21b5a7ade31 ]
+
+The watch_queue_set_size() allocation error paths return the ret value
+set via the prior pipe_resize_ring() call, which will always be zero.
+
+As a result, IOC_WATCH_QUEUE_SET_SIZE callers such as "keyctl watch"
+fail to detect kernel wqueue->notes allocation failures and proceed to
+KEYCTL_WATCH_KEY, with any notifications subsequently lost.
+
+Fixes: c73be61cede58 ("pipe: Add general notification queue support")
+Signed-off-by: David Disseldorp <ddiss@suse.de>
+Signed-off-by: Christian Brauner (Microsoft) <brauner@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ kernel/watch_queue.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/kernel/watch_queue.c b/kernel/watch_queue.c
+index a6f9bdd956c39..f10f403104e7d 100644
+--- a/kernel/watch_queue.c
++++ b/kernel/watch_queue.c
+@@ -273,6 +273,7 @@ long watch_queue_set_size(struct pipe_inode_info *pipe, unsigned int nr_notes)
+ if (ret < 0)
+ goto error;
+
++ ret = -ENOMEM;
+ pages = kcalloc(sizeof(struct page *), nr_pages, GFP_KERNEL);
+ if (!pages)
+ goto error;
+--
+2.39.2
+
projects / thirdparty / kernel / stable-queue.git / commitdiff
