arm64: dts: ti: k3-j721s2-main: Add CSI2RX capture nodes

J721S2 has two CSI2RX capture subsystem featuring Cadence CSI2RX,
DPHY and TI's pixel grabbing wrapper. Add nodes for the same and
keep them disabled by default. J721S2 uses a dedicated BCDMA instance
for CSI-RX traffic, so enable that as well.

J721S2 TRM (Section 12.7 Camera Subsystem):
	https://www.ti.com/lit/zip/spruj28

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Jai Luthra <j-luthra@ti.com>
Link: https://lore.kernel.org/r/20240215085518.552692-8-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 47c58b9f5d7665c69467c4bd1b66894bd87b47b6..d797b070d72eebad2f3a79cd9823d1fbe90fbd01 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1122,7 +1122,6 @@
                        ti,sci-dev-id = <225>;
                        ti,sci-rm-range-rchan = <0x21>;
                        ti,sci-rm-range-tchan = <0x22>;
-                       status = "disabled";
                };
 
                cpts@310d0000 {
@@ -1233,6 +1232,128 @@
                };
        };
 
+       ti_csi2rx0: ticsi2rx@4500000 {
+               compatible = "ti,j721e-csi2rx-shim";
+               reg = <0x00 0x04500000 0x00 0x1000>;
+               ranges;
+               #address-cells = <2>;
+               #size-cells = <2>;
+               dmas = <&main_bcdma_csi 0 0x4940 0>;
+               dma-names = "rx0";
+               power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
+               status = "disabled";
+
+               cdns_csi2rx0: csi-bridge@4504000 {
+                       compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+                       reg = <0x00 0x04504000 0x00 0x1000>;
+                       clocks = <&k3_clks 38 3>, <&k3_clks 38 1>, <&k3_clks 38 3>,
+                               <&k3_clks 38 3>, <&k3_clks 38 4>, <&k3_clks 38 4>;
+                       clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+                               "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+                       phys = <&dphy0>;
+                       phy-names = "dphy";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               csi0_port0: port@0 {
+                                       reg = <0>;
+                                       status = "disabled";
+                               };
+
+                               csi0_port1: port@1 {
+                                       reg = <1>;
+                                       status = "disabled";
+                               };
+
+                               csi0_port2: port@2 {
+                                       reg = <2>;
+                                       status = "disabled";
+                               };
+
+                               csi0_port3: port@3 {
+                                       reg = <3>;
+                                       status = "disabled";
+                               };
+
+                               csi0_port4: port@4 {
+                                       reg = <4>;
+                                       status = "disabled";
+                               };
+                       };
+               };
+       };
+
+       ti_csi2rx1: ticsi2rx@4510000 {
+               compatible = "ti,j721e-csi2rx-shim";
+               reg = <0x00 0x04510000 0x00 0x1000>;
+               ranges;
+               #address-cells = <2>;
+               #size-cells = <2>;
+               dmas = <&main_bcdma_csi 0 0x4960 0>;
+               dma-names = "rx0";
+               power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
+               status = "disabled";
+
+               cdns_csi2rx1: csi-bridge@4514000 {
+                       compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
+                       reg = <0x00 0x04514000 0x00 0x1000>;
+                       clocks = <&k3_clks 39 3>, <&k3_clks 39 1>, <&k3_clks 39 3>,
+                               <&k3_clks 39 3>, <&k3_clks 39 4>, <&k3_clks 39 4>;
+                       clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
+                               "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
+                       phys = <&dphy1>;
+                       phy-names = "dphy";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               csi1_port0: port@0 {
+                                       reg = <0>;
+                                       status = "disabled";
+                               };
+
+                               csi1_port1: port@1 {
+                                       reg = <1>;
+                                       status = "disabled";
+                               };
+
+                               csi1_port2: port@2 {
+                                       reg = <2>;
+                                       status = "disabled";
+                               };
+
+                               csi1_port3: port@3 {
+                                       reg = <3>;
+                                       status = "disabled";
+                               };
+
+                               csi1_port4: port@4 {
+                                       reg = <4>;
+                                       status = "disabled";
+                               };
+                       };
+               };
+       };
+
+       dphy0: phy@4580000 {
+               compatible = "cdns,dphy-rx";
+               reg = <0x00 0x04580000 0x00 0x1100>;
+               #phy-cells = <0>;
+               power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
+               status = "disabled";
+       };
+
+       dphy1: phy@4590000 {
+               compatible = "cdns,dphy-rx";
+               reg = <0x00 0x04590000 0x00 0x1100>;
+               #phy-cells = <0>;
+               power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
+               status = "disabled";
+       };
+
        serdes_wiz0: wiz@5060000 {
                compatible = "ti,j721s2-wiz-10g";
                #address-cells = <1>;