drm/xe/bmg: Update Wa_16023588340

This allows for additional L2 caching modes.

Fixes: 01570b446939 ("drm/xe/bmg: implement Wa_16023588340")
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Link: https://lore.kernel.org/r/20250612-wa-14022085890-v4-2-94ba5dcc1e30@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
index 858b5398c01b791a2f642638fdfe54103f4746ed..9752a38c0162af2ddf8693d6fe31846e4e459ad6 100644 (file)
--- a/drivers/gpu/drm/xe/xe_gt.c
+++ b/drivers/gpu/drm/xe/xe_gt.c
@@ -118,7 +118,7 @@ static void xe_gt_enable_host_l2_vram(struct xe_gt *gt)
                xe_gt_mcr_multicast_write(gt, XE2_GAMREQSTRM_CTRL, reg);
        }
 
-       xe_gt_mcr_multicast_write(gt, XEHPC_L3CLOS_MASK(3), 0x3);
+       xe_gt_mcr_multicast_write(gt, XEHPC_L3CLOS_MASK(3), 0xF);
        xe_force_wake_put(gt_to_fw(gt), fw_ref);
 }