]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
RDMA/hns: Check atomic wr length
authorJunxian Huang <huangjunxian6@hisilicon.com>
Wed, 10 Jul 2024 13:36:58 +0000 (21:36 +0800)
committerLeon Romanovsky <leon@kernel.org>
Thu, 11 Jul 2024 10:25:11 +0000 (13:25 +0300)
8 bytes is the only supported length of atomic. Add this check in
set_rc_wqe(). Besides, stop processing WQEs and return from
set_rc_wqe() if there is any error.

Fixes: 384f88185112 ("RDMA/hns: Add atomic support")
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Link: https://lore.kernel.org/r/20240710133705.896445-2-huangjunxian6@hisilicon.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
drivers/infiniband/hw/hns/hns_roce_device.h
drivers/infiniband/hw/hns/hns_roce_hw_v2.c

index ef50cd03f489039d6da7413c6c5be0e8e2935ef3..bf7f966c89fcad7bb23694886666e8269339cf90 100644 (file)
@@ -91,6 +91,8 @@
 /* Configure to HW for PAGE_SIZE larger than 4KB */
 #define PG_SHIFT_OFFSET                                (PAGE_SHIFT - 12)
 
+#define ATOMIC_WR_LEN                          8
+
 #define HNS_ROCE_IDX_QUE_ENTRY_SZ              4
 #define SRQ_DB_REG                             0x230
 
index 4287818a737f9780e15efc77bdb522bbed18c571..eb6052ee89383f1b130457354626b327aee81422 100644 (file)
@@ -591,11 +591,16 @@ static inline int set_rc_wqe(struct hns_roce_qp *qp,
                     (wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0);
 
        if (wr->opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
-           wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
+           wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
+               if (msg_len != ATOMIC_WR_LEN)
+                       return -EINVAL;
                set_atomic_seg(wr, rc_sq_wqe, valid_num_sge);
-       else if (wr->opcode != IB_WR_REG_MR)
+       } else if (wr->opcode != IB_WR_REG_MR) {
                ret = set_rwqe_data_seg(&qp->ibqp, wr, rc_sq_wqe,
                                        &curr_idx, valid_num_sge);
+               if (ret)
+                       return ret;
+       }
 
        /*
         * The pipeline can sequentially post all valid WQEs into WQ buffer,