drm/i915: Remove nonpriv flags when srm/lrm

On testing the whitelists, using any of the nonpriv
flags when trying to access the register offset will lead
to failure.

Define address mask to get the mmio offset in order
to guard against any current and future flag usage.

v2: apply also on scrub_whitelisted_registers (Lionel)

Cc: Tapani Pälli <tapani.palli@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191024110331.8935-1-mika.kuoppala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index ef02920cec2988bb64735251afce05f2cea4d8a7..abce6e4ec9c06d403415f370db0335ebce454ba8 100644 (file)
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -513,6 +513,9 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
 
                ro_reg = ro_register(reg);
 
+               /* Clear non priv flags */
+               reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+
                srm = MI_STORE_REGISTER_MEM;
                lrm = MI_LOAD_REGISTER_MEM;
                if (INTEL_GEN(ctx->i915) >= 8)
@@ -810,8 +813,8 @@ static int read_whitelisted_registers(struct i915_gem_context *ctx,
                u64 offset = results->node.start + sizeof(u32) * i;
                u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);
 
-               /* Clear access permission field */
-               reg &= ~RING_FORCE_TO_NONPRIV_ACCESS_MASK;
+               /* Clear non priv flags */
+               reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
 
                *cs++ = srm;
                *cs++ = reg;
@@ -849,6 +852,9 @@ static int scrub_whitelisted_registers(struct i915_gem_context *ctx,
                if (ro_register(reg))
                        continue;
 
+               /* Clear non priv flags */
+               reg &= RING_FORCE_TO_NONPRIV_ADDRESS_MASK;
+
                *cs++ = reg;
                *cs++ = 0xffffffff;
        }

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 855db888516c45a11d65b96836779f5649564869..3ba503b5e0d961dc230d8a8ceef02f1edc86327c 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2490,6 +2490,7 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define GEN8_RING_CS_GPR_UDW(base, n)  _MMIO((base) + 0x600 + (n) * 8 + 4)
 
 #define RING_FORCE_TO_NONPRIV(base, i) _MMIO(((base) + 0x4D0) + (i) * 4)
+#define   RING_FORCE_TO_NONPRIV_ADDRESS_MASK   REG_GENMASK(25, 2)
 #define   RING_FORCE_TO_NONPRIV_ACCESS_RW      (0 << 28)    /* CFL+ & Gen11+ */
 #define   RING_FORCE_TO_NONPRIV_ACCESS_RD      (1 << 28)
 #define   RING_FORCE_TO_NONPRIV_ACCESS_WR      (2 << 28)