]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: ti: k3-j7200: Add node to disable loopback connection
authorAnurag Dutta <a-dutta@ti.com>
Wed, 27 Nov 2024 07:56:44 +0000 (13:26 +0530)
committerNishanth Menon <nm@ti.com>
Thu, 2 Jan 2025 16:19:59 +0000 (10:19 -0600)
CTRLMMR_MCU_SPI1_CTRL register controls if MCU_SPI1 is directly
connected to SPI3 in the MAIN Domain (default) or if MCU_SPI1
and SPI3 are independently pinned out. By default, the field
SPI1_LINKDIS (Bit 0) is set to 0h. In order to disable the direct
connection, the SPI1_LINKDIS (Bit 0) needs to be set to 1h. Model
this functionality as a "reg-mux" device and based on the idle-state
property, enable/disable the connection bewtween MCU_SPI1 and MAIN_SPI3.

The register field description has been referred from J7200 TRM [1]
(Table 5-517. CTRLMMR_MCU_SPI1_CTRL Register Field Descriptions).

[1] https://www.ti.com/lit/pdf/spruiu1

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Link: https://lore.kernel.org/r/20241127075644.210759-1-a-dutta@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi

index db43e7e10b76db0b7967cc38d66b3a4caa07ffa5..f684ce6ad9ad2f930612eecb7e6677b62db99d5a 100644 (file)
                      <J7200_SERDES0_LANE2_QSGMII_LANE1>, <J7200_SERDES0_LANE3_IP4_UNUSED>;
 };
 
+&mcu_spi1 {
+       mux-controls = <&spi1_linkdis 0>;
+};
+
 &usb_serdes_mux {
        idle-states = <1>; /* USB0 to SERDES lane 3 */
        bootph-all;
index 6a84538658746539aa208ef417e524a7b7e1c9f8..56ab144fea07e2a63a721b8be3edf87f04aacb35 100644 (file)
                        reg = <0x4040 0x4>;
                        #phy-cells = <1>;
                };
+
+               spi1_linkdis: mux-controller@4060 {
+                       compatible = "reg-mux";
+                       reg = <0x4060 0x4>;
+                       #mux-control-cells = <1>;
+                       mux-reg-masks = <0x0 0x1>;
+               };
        };
 
        wkup_conf: bus@43000000 {