arm: [MVE intrinsics] rework vgetq_lane vsetq_lane

Implement vgetq_lane and vsetq_lane using the new MVE builtins
framework.

Although MVE intrinsics are not supported in big-endian mode, we keep
the code to convert lane indices into GCC's vector indices, so that
it's already in place in case we want to support big-endian in the
future.

The patch adds new tests, to check that we emit an error when the lane
number is not in the expected range.

gcc/ChangeLog:

	* config/arm/arm-mve-builtins-base.cc (class
	mve_function_vset_vget_lane): New.
	(vgetq_lane, vsetq_lane): New.
	* config/arm/arm-mve-builtins-base.def (vgetq_lane, vsetq_lane):
	New.
	* config/arm/arm-mve-builtins-base.h (vgetq_lane, vsetq_lane):
	New.

	* config/arm/arm-mve-builtins-shapes.cc (struct getq_lane)
	(setq_lane): New.
	* config/arm/arm-mve-builtins-shapes.h (getq_lane, setq_lane):
	New.
	* config/arm/arm_mve.h (vsetq_lane): Delete.
	(vgetq_lane): Delete.
	(vsetq_lane_f16): Delete.
	(vsetq_lane_f32): Delete.
	(vsetq_lane_s16): Delete.
	(vsetq_lane_s32): Delete.
	(vsetq_lane_s8): Delete.
	(vsetq_lane_s64): Delete.
	(vsetq_lane_u8): Delete.
	(vsetq_lane_u16): Delete.
	(vsetq_lane_u32): Delete.
	(vsetq_lane_u64): Delete.
	(vgetq_lane_f16): Delete.
	(vgetq_lane_f32): Delete.
	(vgetq_lane_s16): Delete.
	(vgetq_lane_s32): Delete.
	(vgetq_lane_s8): Delete.
	(vgetq_lane_s64): Delete.
	(vgetq_lane_u8): Delete.
	(vgetq_lane_u16): Delete.
	(vgetq_lane_u32): Delete.
	(vgetq_lane_u64): Delete.
	(__ARM_NUM_LANES): Delete.
	(__ARM_LANEQ): Delete.
	(__ARM_CHECK_LANEQ): Delete.
	(__arm_vsetq_lane_s16): Delete.
	(__arm_vsetq_lane_s32): Delete.
	(__arm_vsetq_lane_s8): Delete.
	(__arm_vsetq_lane_s64): Delete.
	(__arm_vsetq_lane_u8): Delete.
	(__arm_vsetq_lane_u16): Delete.
	(__arm_vsetq_lane_u32): Delete.
	(__arm_vsetq_lane_u64): Delete.
	(__arm_vgetq_lane_s16): Delete.
	(__arm_vgetq_lane_s32): Delete.
	(__arm_vgetq_lane_s8): Delete.
	(__arm_vgetq_lane_s64): Delete.
	(__arm_vgetq_lane_u8): Delete.
	(__arm_vgetq_lane_u16): Delete.
	(__arm_vgetq_lane_u32): Delete.
	(__arm_vgetq_lane_u64): Delete.
	(__arm_vsetq_lane_f16): Delete.
	(__arm_vsetq_lane_f32): Delete.
	(__arm_vgetq_lane_f16): Delete.
	(__arm_vgetq_lane_f32): Delete.
	(__arm_vsetq_lane): Delete.
	(__arm_vgetq_lane): Delete.
	* config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Add '@'
	prefix.
	(mve_vec_set<mode>_internal): Likewise.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/mve/intrinsics/vsetq_lane_f16_bounds.c: New test.
	* gcc.target/arm/mve/intrinsics/vsetq_lane_f32_bounds.c: New test.
	* gcc.target/arm/mve/intrinsics/vsetq_lane_s16_bounds.c: New test.
	* gcc.target/arm/mve/intrinsics/vsetq_lane_s32_bounds.c: New test.
	* gcc.target/arm/mve/intrinsics/vsetq_lane_s64_bounds.c: New test.
	* gcc.target/arm/mve/intrinsics/vsetq_lane_s8_bounds.c: New test.
	* gcc.target/arm/mve/intrinsics/vsetq_lane_u16_bounds.c: New test.
	* gcc.target/arm/mve/intrinsics/vsetq_lane_u32_bounds.c: New test.
	* gcc.target/arm/mve/intrinsics/vsetq_lane_u64_bounds.c: New test.
	* gcc.target/arm/mve/intrinsics/vsetq_lane_u8_bounds.c: New test.

diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc
index 1b2b187063594e8ce47da0fb7e65ae9f8c7ececf..6df469ddf7867b926039d9605979e416e8f49f30 100644 (file)
--- a/gcc/config/arm/arm-mve-builtins-base.cc
+++ b/gcc/config/arm/arm-mve-builtins-base.cc
@@ -1298,6 +1298,63 @@ public:
   }
 };
 
+ /* Map the function directly to mve_vec_set_internal (M) or mve_vec_extract
+   (M, M) where M is the vector mode associated with type suffix 0, except when
+   mode is V2DI where the builtin name is hardcoded.  */
+class mve_function_vsetq_vgetq_lane : public function_base
+{
+public:
+  CONSTEXPR mve_function_vsetq_vgetq_lane (bool is_get)
+    : m_is_get (is_get)
+  {}
+
+  /* True for vgetq_lane, false for vsetq_lane.  */
+  bool m_is_get;
+
+  rtx
+  expand (function_expander &e) const override
+  {
+    machine_mode mode = e.vector_mode (0);
+    insn_code code;
+    HOST_WIDE_INT elem;
+
+    code = (mode == V2DImode)
+      ? (m_is_get
+        ? CODE_FOR_mve_vec_extractv2didi
+        : CODE_FOR_mve_vec_setv2di_internal)
+      : (m_is_get
+        ? code_for_mve_vec_extract (mode, mode)
+        : code_for_mve_vec_set_internal (mode));
+
+    if (!m_is_get)
+      {
+       /* mve_vec_set has vector and lane number arguments in opposite order
+          compared to the intrinsic: swap them now...  */
+       std::swap (e.args[1], e.args[2]);
+      }
+
+    elem = INTVAL (e.args[1]);
+
+    /* For big-endian, GCC's vector indices are reversed within each 64 bits
+       compared to the architectural lane indices used by MVE intrinsics.  */
+    if (BYTES_BIG_ENDIAN)
+      {
+       unsigned int num_lanes = 128 / e.type_suffix (0).element_bits;
+       elem ^= (num_lanes / 2) - 1;
+      }
+
+    if (!m_is_get)
+      {
+       /* ... and convert the lane number into a mask as expected by the
+          builtin.  */
+       elem = HOST_WIDE_INT_1 << elem;
+      }
+    e.args[1] = GEN_INT (elem);
+
+    return e.use_unpred_insn (code);
+  }
+};
+
 } /* end anonymous namespace */
 
 namespace arm_mve {
@@ -1537,6 +1594,7 @@ FUNCTION_WITH_RTX_M (veorq, XOR, VEORQ)
 FUNCTION (vfmaq, unspec_mve_function_exact_insn, (-1, -1, VFMAQ_F, -1, -1, VFMAQ_N_F, -1, -1, VFMAQ_M_F, -1, -1, VFMAQ_M_N_F))
 FUNCTION (vfmasq, unspec_mve_function_exact_insn, (-1, -1, -1, -1, -1, VFMASQ_N_F, -1, -1, -1, -1, -1, VFMASQ_M_N_F))
 FUNCTION (vfmsq, unspec_mve_function_exact_insn, (-1, -1, VFMSQ_F, -1, -1, -1, -1, -1, VFMSQ_M_F, -1, -1, -1))
+FUNCTION (vgetq_lane, mve_function_vsetq_vgetq_lane, (true))
 FUNCTION_WITH_M_N_NO_F (vhaddq, VHADDQ)
 FUNCTION_WITH_M_N_NO_F (vhsubq, VHSUBQ)
 FUNCTION (vld1q, vld1_impl,)
@@ -1665,6 +1723,7 @@ FUNCTION_ONLY_N_NO_F (vrshrntq, VRSHRNTQ)
 FUNCTION_ONLY_N_NO_F (vrshrq, VRSHRQ)
 FUNCTION (vsbciq, vadc_vsbc_impl, (true, false))
 FUNCTION (vsbcq, vadc_vsbc_impl, (false, false))
+FUNCTION (vsetq_lane, mve_function_vsetq_vgetq_lane, (false))
 FUNCTION (vshlcq, vshlc_impl,)
 FUNCTION_ONLY_N_NO_F (vshllbq, VSHLLBQ)
 FUNCTION_ONLY_N_NO_F (vshlltq, VSHLLTQ)

diff --git a/gcc/config/arm/arm-mve-builtins-base.def b/gcc/config/arm/arm-mve-builtins-base.def
index f2442617aa47a970777d70a61b0da1e70320c178..9b9603e87b00974e3acbec167d62610c8ce30e48 100644 (file)
--- a/gcc/config/arm/arm-mve-builtins-base.def
+++ b/gcc/config/arm/arm-mve-builtins-base.def
@@ -68,6 +68,7 @@ DEF_MVE_FUNCTION (vddupq, viddup, all_unsigned, mx_or_none)
 DEF_MVE_FUNCTION (vdupq, unary_n, all_integer, mx_or_none)
 DEF_MVE_FUNCTION (vdwdupq, vidwdup, all_unsigned, mx_or_none)
 DEF_MVE_FUNCTION (veorq, binary, all_integer, mx_or_none)
+DEF_MVE_FUNCTION (vgetq_lane, getq_lane, all_integer_with_64, none)
 DEF_MVE_FUNCTION (vhaddq, binary_opt_n, all_integer, mx_or_none)
 DEF_MVE_FUNCTION (vhcaddq_rot270, binary, all_signed, mx_or_none)
 DEF_MVE_FUNCTION (vhcaddq_rot90, binary, all_signed, mx_or_none)
@@ -188,6 +189,7 @@ DEF_MVE_FUNCTION (vrshrq, binary_rshift, all_integer, mx_or_none)
 DEF_MVE_FUNCTION (vsbciq, vadc_vsbc, integer_32, m_or_none)
 DEF_MVE_FUNCTION (vsbcq, vadc_vsbc, integer_32, m_or_none)
 DEF_MVE_FUNCTION (vshlcq, vshlc, all_integer, m_or_none)
+DEF_MVE_FUNCTION (vsetq_lane, setq_lane, all_integer_with_64, none)
 DEF_MVE_FUNCTION (vshllbq, binary_widen_n, integer_8_16, mx_or_none)
 DEF_MVE_FUNCTION (vshlltq, binary_widen_n, integer_8_16, mx_or_none)
 DEF_MVE_FUNCTION (vshlq, binary_lshift, all_integer, mx_or_none)
@@ -254,6 +256,7 @@ DEF_MVE_FUNCTION (veorq, binary, all_float, mx_or_none)
 DEF_MVE_FUNCTION (vfmaq, ternary_opt_n, all_float, m_or_none)
 DEF_MVE_FUNCTION (vfmasq, ternary_n, all_float, m_or_none)
 DEF_MVE_FUNCTION (vfmsq, ternary, all_float, m_or_none)
+DEF_MVE_FUNCTION (vgetq_lane, getq_lane, all_float, none)
 DEF_MVE_FUNCTION (vld1q, load, all_float, z_or_none)
 DEF_MVE_FUNCTION (vld2q, load, all_float, none)
 DEF_MVE_FUNCTION (vld4q, load, all_float, none)
@@ -286,6 +289,7 @@ DEF_MVE_FUNCTION (vrndnq, unary, all_float, mx_or_none)
 DEF_MVE_FUNCTION (vrndpq, unary, all_float, mx_or_none)
 DEF_MVE_FUNCTION (vrndq, unary, all_float, mx_or_none)
 DEF_MVE_FUNCTION (vrndxq, unary, all_float, mx_or_none)
+DEF_MVE_FUNCTION (vsetq_lane, setq_lane, all_float, none)
 DEF_MVE_FUNCTION (vst1q, store, all_float, p_or_none)
 DEF_MVE_FUNCTION (vst2q, store, all_float, none)
 DEF_MVE_FUNCTION (vst4q, store, all_float, none)

diff --git a/gcc/config/arm/arm-mve-builtins-base.h b/gcc/config/arm/arm-mve-builtins-base.h
index aac5f8067eb060b17d9c515e6fadf0255f8ef785..60bf51bb75212e848857ed29ce53d4d2268f3b2d 100644 (file)
--- a/gcc/config/arm/arm-mve-builtins-base.h
+++ b/gcc/config/arm/arm-mve-builtins-base.h
@@ -91,6 +91,7 @@ extern const function_base *const veorq;
 extern const function_base *const vfmaq;
 extern const function_base *const vfmasq;
 extern const function_base *const vfmsq;
+extern const function_base *const vgetq_lane;
 extern const function_base *const vhaddq;
 extern const function_base *const vhcaddq_rot270;
 extern const function_base *const vhcaddq_rot90;
@@ -223,6 +224,7 @@ extern const function_base *const vrshrntq;
 extern const function_base *const vrshrq;
 extern const function_base *const vsbciq;
 extern const function_base *const vsbcq;
+extern const function_base *const vsetq_lane;
 extern const function_base *const vshlcq;
 extern const function_base *const vshllbq;
 extern const function_base *const vshlltq;

diff --git a/gcc/config/arm/arm-mve-builtins-shapes.cc b/gcc/config/arm/arm-mve-builtins-shapes.cc
index 1eeae176584ed431a8f8547f5fb27f00c821be62..dd3be87fc9cec73776ec32efeb646815e9e2d03e 100644 (file)
--- a/gcc/config/arm/arm-mve-builtins-shapes.cc
+++ b/gcc/config/arm/arm-mve-builtins-shapes.cc
@@ -1467,6 +1467,47 @@ struct create_def : public nonoverloaded_base
 };
 SHAPE (create)
 
+/* <S0>_t vfoo[_t0](<T0>_t, const int)
+
+   Check that 'idx' is in the [0..#num_lanes - 1] range.
+
+   Example: vgetq_lane.
+   int8_t [__arm_]vgetq_lane[_s8](int8x16_t a, const int idx)  */
+
+struct getq_lane_def : public overloaded_base<0>
+{
+  void
+  build (function_builder &b, const function_group_info &group,
+        bool preserve_user_namespace) const override
+  {
+    b.add_overloaded_functions (group, MODE_none, preserve_user_namespace);
+    build_all (b, "s0,v0,su64", group, MODE_none, preserve_user_namespace);
+  }
+
+  tree
+  resolve (function_resolver &r) const override
+  {
+    unsigned int i, nargs;
+    type_suffix_index type;
+    if (!r.check_gp_argument (2, i, nargs)
+       || (type = r.infer_vector_type (i-1)) == NUM_TYPE_SUFFIXES
+       || !r.require_integer_immediate (i))
+      return error_mark_node;
+
+    return r.resolve_to (r.mode_suffix_id, type);
+  }
+
+  bool
+  check (function_checker &c) const override
+  {
+    unsigned int num_lanes = 128 / c.type_suffix (0).element_bits;
+
+    return c.require_immediate_range (1, 0, num_lanes - 1);
+  }
+
+};
+SHAPE (getq_lane)
+
 /* <T0>[xN]_t vfoo_t0().
 
    Example: vuninitializedq.
@@ -1834,6 +1875,46 @@ struct scalar_u64_shift_imm_def : public nonoverloaded_base
 };
 SHAPE (scalar_u64_shift_imm)
 
+/* <T0>_t vfoo[_t0](<S0>_t, <T0>_t, const_int)
+
+   Check that 'idx' is in the [0..#num_lanes - 1] range.
+
+   Example: vsetq_lane.
+   int8x16_t [__arm_]vsetq_lane[_s8](int8_t a, int8x16_t b, const int idx)  */
+struct setq_lane_def : public overloaded_base<0>
+{
+  void
+  build (function_builder &b, const function_group_info &group,
+        bool preserve_user_namespace) const override
+  {
+    b.add_overloaded_functions (group, MODE_none, preserve_user_namespace);
+    build_all (b, "v0,s0,v0,su64", group, MODE_none, preserve_user_namespace);
+  }
+
+  tree
+  resolve (function_resolver &r) const override
+  {
+    unsigned int i, nargs;
+    type_suffix_index type;
+    if (!r.check_gp_argument (3, i, nargs)
+       || (type = r.infer_vector_type (i-1)) == NUM_TYPE_SUFFIXES
+       || !r.require_derived_scalar_type (i - 2, r.SAME_TYPE_CLASS)
+       || !r.require_integer_immediate (i))
+      return error_mark_node;
+
+    return r.resolve_to (r.mode_suffix_id, type);
+  }
+
+  bool
+  check (function_checker &c) const override
+  {
+    unsigned int num_lanes = 128 / c.type_suffix (0).element_bits;
+
+    return c.require_immediate_range (2, 0, num_lanes - 1);
+  }
+};
+SHAPE (setq_lane)
+
 /* void vfoo[_t0](<X>_t *, <T0>[xN]_t)
 
    where <X> might be tied to <t0> (for non-truncating stores) or might

diff --git a/gcc/config/arm/arm-mve-builtins-shapes.h b/gcc/config/arm/arm-mve-builtins-shapes.h
index c384da8c6a72765598ea0d024fa3646bf172648a..22d06ce0ebd369ca3142019a263e366aa3f52e90 100644 (file)
--- a/gcc/config/arm/arm-mve-builtins-shapes.h
+++ b/gcc/config/arm/arm-mve-builtins-shapes.h
@@ -60,6 +60,7 @@ namespace arm_mve
     extern const function_shape *const binary_widen_poly;
     extern const function_shape *const cmp;
     extern const function_shape *const create;
+    extern const function_shape *const getq_lane;
     extern const function_shape *const inherent;
     extern const function_shape *const load;
     extern const function_shape *const load_ext;
@@ -74,6 +75,7 @@ namespace arm_mve
     extern const function_shape *const scalar_s64_shift_imm;
     extern const function_shape *const scalar_u64_shift;
     extern const function_shape *const scalar_u64_shift_imm;
+    extern const function_shape *const setq_lane;
     extern const function_shape *const store;
     extern const function_shape *const store_scatter_base;
     extern const function_shape *const store_scatter_offset;

diff --git a/gcc/config/arm/arm_mve.h b/gcc/config/arm/arm_mve.h
index 405a3d01965045b48c4d7b02140fb65cb26cbc61..b66b712c4ce2d3d80288c1a1b877e7a4c4395ea9 100644 (file)
--- a/gcc/config/arm/arm_mve.h
+++ b/gcc/config/arm/arm_mve.h
@@ -46,8 +46,6 @@
 
 #ifndef __ARM_MVE_PRESERVE_USER_NAMESPACE
 #define vuninitializedq(__v) __arm_vuninitializedq(__v)
-#define vsetq_lane(__a, __b, __idx) __arm_vsetq_lane(__a, __b, __idx)
-#define vgetq_lane(__a, __idx) __arm_vgetq_lane(__a, __idx)
 
 
 #define vuninitializedq_u8(void) __arm_vuninitializedq_u8(void)
@@ -60,359 +58,11 @@
 #define vuninitializedq_s64(void) __arm_vuninitializedq_s64(void)
 #define vuninitializedq_f16(void) __arm_vuninitializedq_f16(void)
 #define vuninitializedq_f32(void) __arm_vuninitializedq_f32(void)
-#define vsetq_lane_f16(__a, __b,  __idx) __arm_vsetq_lane_f16(__a, __b,  __idx)
-#define vsetq_lane_f32(__a, __b,  __idx) __arm_vsetq_lane_f32(__a, __b,  __idx)
-#define vsetq_lane_s16(__a, __b,  __idx) __arm_vsetq_lane_s16(__a, __b,  __idx)
-#define vsetq_lane_s32(__a, __b,  __idx) __arm_vsetq_lane_s32(__a, __b,  __idx)
-#define vsetq_lane_s8(__a, __b,  __idx) __arm_vsetq_lane_s8(__a, __b,  __idx)
-#define vsetq_lane_s64(__a, __b,  __idx) __arm_vsetq_lane_s64(__a, __b,  __idx)
-#define vsetq_lane_u8(__a, __b,  __idx) __arm_vsetq_lane_u8(__a, __b,  __idx)
-#define vsetq_lane_u16(__a, __b,  __idx) __arm_vsetq_lane_u16(__a, __b,  __idx)
-#define vsetq_lane_u32(__a, __b,  __idx) __arm_vsetq_lane_u32(__a, __b,  __idx)
-#define vsetq_lane_u64(__a, __b,  __idx) __arm_vsetq_lane_u64(__a, __b,  __idx)
-#define vgetq_lane_f16(__a,  __idx) __arm_vgetq_lane_f16(__a,  __idx)
-#define vgetq_lane_f32(__a,  __idx) __arm_vgetq_lane_f32(__a,  __idx)
-#define vgetq_lane_s16(__a,  __idx) __arm_vgetq_lane_s16(__a,  __idx)
-#define vgetq_lane_s32(__a,  __idx) __arm_vgetq_lane_s32(__a,  __idx)
-#define vgetq_lane_s8(__a,  __idx) __arm_vgetq_lane_s8(__a,  __idx)
-#define vgetq_lane_s64(__a,  __idx) __arm_vgetq_lane_s64(__a,  __idx)
-#define vgetq_lane_u8(__a,  __idx) __arm_vgetq_lane_u8(__a,  __idx)
-#define vgetq_lane_u16(__a,  __idx) __arm_vgetq_lane_u16(__a,  __idx)
-#define vgetq_lane_u32(__a,  __idx) __arm_vgetq_lane_u32(__a,  __idx)
-#define vgetq_lane_u64(__a,  __idx) __arm_vgetq_lane_u64(__a,  __idx)
 #endif
 
-/* For big-endian, GCC's vector indices are reversed within each 64 bits
-   compared to the architectural lane indices used by MVE intrinsics.  */
-#define __ARM_NUM_LANES(__v) (sizeof (__v) / sizeof (__v[0]))
-#ifdef __ARM_BIG_ENDIAN
-#define __ARM_LANEQ(__vec, __idx) (__idx ^ (__ARM_NUM_LANES(__vec)/2 - 1))
-#else
-#define __ARM_LANEQ(__vec, __idx) __idx
-#endif
-#define __ARM_CHECK_LANEQ(__vec, __idx)                 \
-  __builtin_arm_lane_check (__ARM_NUM_LANES(__vec),     \
-                           __ARM_LANEQ(__vec, __idx))
-
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane_s16 (int16_t __a, int16x8_t __b, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__b, __idx);
-  __b[__ARM_LANEQ(__b,__idx)] = __a;
-  return __b;
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane_s32 (int32_t __a, int32x4_t __b, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__b, __idx);
-  __b[__ARM_LANEQ(__b,__idx)] = __a;
-  return __b;
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane_s8 (int8_t __a, int8x16_t __b, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__b, __idx);
-  __b[__ARM_LANEQ(__b,__idx)] = __a;
-  return __b;
-}
-
-__extension__ extern __inline int64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane_s64 (int64_t __a, int64x2_t __b, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__b, __idx);
-  __b[__ARM_LANEQ(__b,__idx)] = __a;
-  return __b;
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane_u8 (uint8_t __a, uint8x16_t __b, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__b, __idx);
-  __b[__ARM_LANEQ(__b,__idx)] = __a;
-  return __b;
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane_u16 (uint16_t __a, uint16x8_t __b, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__b, __idx);
-  __b[__ARM_LANEQ(__b,__idx)] = __a;
-  return __b;
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane_u32 (uint32_t __a, uint32x4_t __b, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__b, __idx);
-  __b[__ARM_LANEQ(__b,__idx)] = __a;
-  return __b;
-}
-
-__extension__ extern __inline uint64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane_u64 (uint64_t __a, uint64x2_t __b, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__b, __idx);
-  __b[__ARM_LANEQ(__b,__idx)] = __a;
-  return __b;
-}
-
-__extension__ extern __inline int16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane_s16 (int16x8_t __a, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__a, __idx);
-  return __a[__ARM_LANEQ(__a,__idx)];
-}
-
-__extension__ extern __inline int32_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane_s32 (int32x4_t __a, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__a, __idx);
-  return __a[__ARM_LANEQ(__a,__idx)];
-}
-
-__extension__ extern __inline int8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane_s8 (int8x16_t __a, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__a, __idx);
-  return __a[__ARM_LANEQ(__a,__idx)];
-}
-
-__extension__ extern __inline int64_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane_s64 (int64x2_t __a, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__a, __idx);
-  return __a[__ARM_LANEQ(__a,__idx)];
-}
-
-__extension__ extern __inline uint8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane_u8 (uint8x16_t __a, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__a, __idx);
-  return __a[__ARM_LANEQ(__a,__idx)];
-}
-
-__extension__ extern __inline uint16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane_u16 (uint16x8_t __a, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__a, __idx);
-  return __a[__ARM_LANEQ(__a,__idx)];
-}
-
-__extension__ extern __inline uint32_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane_u32 (uint32x4_t __a, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__a, __idx);
-  return __a[__ARM_LANEQ(__a,__idx)];
-}
-
-__extension__ extern __inline uint64_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane_u64 (uint64x2_t __a, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__a, __idx);
-  return __a[__ARM_LANEQ(__a,__idx)];
-}
-
-
-#if (__ARM_FEATURE_MVE & 2) /* MVE Floating point.  */
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane_f16 (float16_t __a, float16x8_t __b, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__b, __idx);
-  __b[__ARM_LANEQ(__b,__idx)] = __a;
-  return __b;
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane_f32 (float32_t __a, float32x4_t __b, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__b, __idx);
-  __b[__ARM_LANEQ(__b,__idx)] = __a;
-  return __b;
-}
-
-__extension__ extern __inline float16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane_f16 (float16x8_t __a, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__a, __idx);
-  return __a[__ARM_LANEQ(__a,__idx)];
-}
-
-__extension__ extern __inline float32_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane_f32 (float32x4_t __a, const int __idx)
-{
-  __ARM_CHECK_LANEQ (__a, __idx);
-  return __a[__ARM_LANEQ(__a,__idx)];
-}
-#endif
 
 #ifdef __cplusplus
 
-__extension__ extern __inline int16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane (int16_t __a, int16x8_t __b, const int __idx)
-{
- return __arm_vsetq_lane_s16 (__a, __b, __idx);
-}
-
-__extension__ extern __inline int32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane (int32_t __a, int32x4_t __b, const int __idx)
-{
- return __arm_vsetq_lane_s32 (__a, __b, __idx);
-}
-
-__extension__ extern __inline int8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane (int8_t __a, int8x16_t __b, const int __idx)
-{
- return __arm_vsetq_lane_s8 (__a, __b, __idx);
-}
-
-__extension__ extern __inline int64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane (int64_t __a, int64x2_t __b, const int __idx)
-{
- return __arm_vsetq_lane_s64 (__a, __b, __idx);
-}
-
-__extension__ extern __inline uint8x16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane (uint8_t __a, uint8x16_t __b, const int __idx)
-{
- return __arm_vsetq_lane_u8 (__a, __b, __idx);
-}
-
-__extension__ extern __inline uint16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane (uint16_t __a, uint16x8_t __b, const int __idx)
-{
- return __arm_vsetq_lane_u16 (__a, __b, __idx);
-}
-
-__extension__ extern __inline uint32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane (uint32_t __a, uint32x4_t __b, const int __idx)
-{
- return __arm_vsetq_lane_u32 (__a, __b, __idx);
-}
-
-__extension__ extern __inline uint64x2_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane (uint64_t __a, uint64x2_t __b, const int __idx)
-{
- return __arm_vsetq_lane_u64 (__a, __b, __idx);
-}
-
-__extension__ extern __inline int16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane (int16x8_t __a, const int __idx)
-{
- return __arm_vgetq_lane_s16 (__a, __idx);
-}
-
-__extension__ extern __inline int32_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane (int32x4_t __a, const int __idx)
-{
- return __arm_vgetq_lane_s32 (__a, __idx);
-}
-
-__extension__ extern __inline int8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane (int8x16_t __a, const int __idx)
-{
- return __arm_vgetq_lane_s8 (__a, __idx);
-}
-
-__extension__ extern __inline int64_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane (int64x2_t __a, const int __idx)
-{
- return __arm_vgetq_lane_s64 (__a, __idx);
-}
-
-__extension__ extern __inline uint8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane (uint8x16_t __a, const int __idx)
-{
- return __arm_vgetq_lane_u8 (__a, __idx);
-}
-
-__extension__ extern __inline uint16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane (uint16x8_t __a, const int __idx)
-{
- return __arm_vgetq_lane_u16 (__a, __idx);
-}
-
-__extension__ extern __inline uint32_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane (uint32x4_t __a, const int __idx)
-{
- return __arm_vgetq_lane_u32 (__a, __idx);
-}
-
-__extension__ extern __inline uint64_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane (uint64x2_t __a, const int __idx)
-{
- return __arm_vgetq_lane_u64 (__a, __idx);
-}
-
-#if (__ARM_FEATURE_MVE & 2)  /* MVE Floating point.  */
-
-__extension__ extern __inline float16x8_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane (float16_t __a, float16x8_t __b, const int __idx)
-{
- return __arm_vsetq_lane_f16 (__a, __b, __idx);
-}
-
-__extension__ extern __inline float32x4_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vsetq_lane (float32_t __a, float32x4_t __b, const int __idx)
-{
- return __arm_vsetq_lane_f32 (__a, __b, __idx);
-}
-
-__extension__ extern __inline float16_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane (float16x8_t __a, const int __idx)
-{
- return __arm_vgetq_lane_f16 (__a, __idx);
-}
-
-__extension__ extern __inline float32_t
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-__arm_vgetq_lane (float32x4_t __a, const int __idx)
-{
- return __arm_vgetq_lane_f32 (__a, __idx);
-}
-#endif /* MVE Floating point.  */
-
 
 __extension__ extern __inline uint8x16_t
 __attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
@@ -736,33 +386,6 @@ extern void *__ARM_undef;
   int (*)[__ARM_mve_type_float16x8_t]: __arm_vuninitializedq_f16 (), \
   int (*)[__ARM_mve_type_float32x4_t]: __arm_vuninitializedq_f32 ());})
 
-#define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \
-  _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
-  int (*)[__ARM_mve_type_int8x16_t]: __arm_vgetq_lane_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
-  int (*)[__ARM_mve_type_int16x8_t]: __arm_vgetq_lane_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
-  int (*)[__ARM_mve_type_int32x4_t]: __arm_vgetq_lane_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
-  int (*)[__ARM_mve_type_int64x2_t]: __arm_vgetq_lane_s64 (__ARM_mve_coerce(__p0, int64x2_t), p1), \
-  int (*)[__ARM_mve_type_uint8x16_t]: __arm_vgetq_lane_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
-  int (*)[__ARM_mve_type_uint16x8_t]: __arm_vgetq_lane_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
-  int (*)[__ARM_mve_type_uint32x4_t]: __arm_vgetq_lane_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1), \
-  int (*)[__ARM_mve_type_uint64x2_t]: __arm_vgetq_lane_u64 (__ARM_mve_coerce(__p0, uint64x2_t), p1), \
-  int (*)[__ARM_mve_type_float16x8_t]: __arm_vgetq_lane_f16 (__ARM_mve_coerce(__p0, float16x8_t), p1), \
-  int (*)[__ARM_mve_type_float32x4_t]: __arm_vgetq_lane_f32 (__ARM_mve_coerce(__p0, float32x4_t), p1));})
-
-#define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
-  __typeof(p1) __p1 = (p1); \
-  _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2), \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float16x8_t]: __arm_vsetq_lane_f16 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float16x8_t), p2), \
-  int (*)[__ARM_mve_type_fp_n][__ARM_mve_type_float32x4_t]: __arm_vsetq_lane_f32 (__ARM_mve_coerce_f_scalar(__p0, double), __ARM_mve_coerce(__p1, float32x4_t), p2));})
-
 #else /* MVE Integer.  */
 
 #define __arm_vuninitializedq(p0) ({ __typeof(p0) __p0 = (p0); \
@@ -776,29 +399,6 @@ extern void *__ARM_undef;
   int (*)[__ARM_mve_type_uint32x4_t]: __arm_vuninitializedq_u32 (), \
   int (*)[__ARM_mve_type_uint64x2_t]: __arm_vuninitializedq_u64 ());})
 
-#define __arm_vgetq_lane(p0,p1) ({ __typeof(p0) __p0 = (p0); \
-  _Generic( (int (*)[__ARM_mve_typeid(__p0)])0, \
-  int (*)[__ARM_mve_type_int8x16_t]: __arm_vgetq_lane_s8 (__ARM_mve_coerce(__p0, int8x16_t), p1), \
-  int (*)[__ARM_mve_type_int16x8_t]: __arm_vgetq_lane_s16 (__ARM_mve_coerce(__p0, int16x8_t), p1), \
-  int (*)[__ARM_mve_type_int32x4_t]: __arm_vgetq_lane_s32 (__ARM_mve_coerce(__p0, int32x4_t), p1), \
-  int (*)[__ARM_mve_type_int64x2_t]: __arm_vgetq_lane_s64 (__ARM_mve_coerce(__p0, int64x2_t), p1), \
-  int (*)[__ARM_mve_type_uint8x16_t]: __arm_vgetq_lane_u8 (__ARM_mve_coerce(__p0, uint8x16_t), p1), \
-  int (*)[__ARM_mve_type_uint16x8_t]: __arm_vgetq_lane_u16 (__ARM_mve_coerce(__p0, uint16x8_t), p1), \
-  int (*)[__ARM_mve_type_uint32x4_t]: __arm_vgetq_lane_u32 (__ARM_mve_coerce(__p0, uint32x4_t), p1), \
-  int (*)[__ARM_mve_type_uint64x2_t]: __arm_vgetq_lane_u64 (__ARM_mve_coerce(__p0, uint64x2_t), p1));})
-
-#define __arm_vsetq_lane(p0,p1,p2) ({ __typeof(p0) __p0 = (p0); \
-  __typeof(p1) __p1 = (p1); \
-  _Generic( (int (*)[__ARM_mve_typeid(__p0)][__ARM_mve_typeid(__p1)])0, \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int8x16_t]: __arm_vsetq_lane_s8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int16x8_t]: __arm_vsetq_lane_s16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int32x4_t]: __arm_vsetq_lane_s32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int32x4_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_int64x2_t]: __arm_vsetq_lane_s64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, int64x2_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint8x16_t]: __arm_vsetq_lane_u8 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint8x16_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint16x8_t]: __arm_vsetq_lane_u16 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint16x8_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint32x4_t]: __arm_vsetq_lane_u32 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint32x4_t), p2), \
-  int (*)[__ARM_mve_type_int_n][__ARM_mve_type_uint64x2_t]: __arm_vsetq_lane_u64 (__ARM_mve_coerce_i_scalar(__p0, int), __ARM_mve_coerce(__p1, uint64x2_t), p2));})
-
 #endif /* MVE Integer.  */
 
 #endif /* __cplusplus  */

diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md
index 33b57080b268d4c02cfb9ba94fe1d2e8c32571b8..b29c5f1bcd5e8f3e3da05a3d65eef41c4b4a516b 100644 (file)
--- a/gcc/config/arm/mve.md
+++ b/gcc/config/arm/mve.md
@@ -4158,10 +4158,11 @@
    return "";
 }
   [(set_attr "length" "16")])
+
 ;;
 ;; [vgetq_lane_u, vgetq_lane_s, vgetq_lane_f])
 ;;
-(define_insn "mve_vec_extract<mode><V_elem_l>"
+(define_insn "@mve_vec_extract<mode><V_elem_l>"
  [(set (match_operand:<V_elem> 0 "nonimmediate_operand" "=r")
    (vec_select:<V_elem>
     (match_operand:MVE_VLD_ST 1 "s_register_operand" "w")
@@ -4236,7 +4237,7 @@
 ;;
 ;; [vsetq_lane_u, vsetq_lane_s, vsetq_lane_f])
 ;;
-(define_insn "mve_vec_set<mode>_internal"
+(define_insn "@mve_vec_set<mode>_internal"
  [(set (match_operand:VQ2 0 "s_register_operand" "=w")
        (vec_merge:VQ2
        (vec_duplicate:VQ2

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16_bounds.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16_bounds.c
new file mode 100644 (file)
index 0000000..0aec13f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f16_bounds.c
@@ -0,0 +1,19 @@
+/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+float16x8_t
+foo (float16_t a, float16x8_t b)
+{
+  return vsetq_lane_f16 (a, b, 9); /* { dg-error {passing 9 to argument 3 of 'vsetq_lane_f16', which expects a value in the range \[0, 7\]} } */
+}
+
+#ifdef __cplusplus
+}
+#endif

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32_bounds.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32_bounds.c
new file mode 100644 (file)
index 0000000..5627e0a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_f32_bounds.c
@@ -0,0 +1,19 @@
+/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */
+/* { dg-add-options arm_v8_1m_mve_fp } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+float32x4_t
+foo (float32_t a, float32x4_t b)
+{
+  return vsetq_lane_f32 (a, b, 4); /* { dg-error {passing 4 to argument 3 of 'vsetq_lane_f32', which expects a value in the range \[0, 3\]} } */
+}
+
+#ifdef __cplusplus
+}
+#endif

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16_bounds.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16_bounds.c
new file mode 100644 (file)
index 0000000..af255f8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s16_bounds.c
@@ -0,0 +1,19 @@
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int16x8_t
+foo (int16_t a, int16x8_t b)
+{
+  return vsetq_lane_s16 (a, b, 9); /* { dg-error {passing 9 to argument 3 of 'vsetq_lane_s16', which expects a value in the range \[0, 7\]} } */
+}
+
+#ifdef __cplusplus
+}
+#endif

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32_bounds.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32_bounds.c
new file mode 100644 (file)
index 0000000..968910c
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s32_bounds.c
@@ -0,0 +1,19 @@
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int32x4_t
+foo (int32_t a, int32x4_t b)
+{
+  return vsetq_lane_s32 (a, b, 4); /* { dg-error {passing 4 to argument 3 of 'vsetq_lane_s32', which expects a value in the range \[0, 3\]} } */
+}
+
+#ifdef __cplusplus
+}
+#endif

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64_bounds.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64_bounds.c
new file mode 100644 (file)
index 0000000..f3bf3ac
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s64_bounds.c
@@ -0,0 +1,19 @@
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int64x2_t
+foo (int64_t a, int64x2_t b)
+{
+  return vsetq_lane_s64 (a, b, 2); /* { dg-error {passing 2 to argument 3 of 'vsetq_lane_s64', which expects a value in the range \[0, 1\]} } */
+}
+
+#ifdef __cplusplus
+}
+#endif

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8_bounds.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8_bounds.c
new file mode 100644 (file)
index 0000000..0f4f238
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_s8_bounds.c
@@ -0,0 +1,19 @@
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int8x16_t
+foo (int8_t a, int8x16_t b)
+{
+  return vsetq_lane_s8 (a, b, 17); /* { dg-error {passing 17 to argument 3 of 'vsetq_lane_s8', which expects a value in the range \[0, 15\]} } */
+}
+
+#ifdef __cplusplus
+}
+#endif

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16_bounds.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16_bounds.c
new file mode 100644 (file)
index 0000000..62a03c0
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u16_bounds.c
@@ -0,0 +1,19 @@
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+uint16x8_t
+foo (uint16_t a, uint16x8_t b)
+{
+  return vsetq_lane_u16 (a, b, 8); /* { dg-error {passing 8 to argument 3 of 'vsetq_lane_u16', which expects a value in the range \[0, 7\]} } */
+}
+
+#ifdef __cplusplus
+}
+#endif

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32_bounds.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32_bounds.c
new file mode 100644 (file)
index 0000000..5836eeb
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u32_bounds.c
@@ -0,0 +1,19 @@
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+uint32x4_t
+foo (uint32_t a, uint32x4_t b)
+{
+  return vsetq_lane_u32 (a, b, 4); /* { dg-error {passing 4 to argument 3 of 'vsetq_lane_u32', which expects a value in the range \[0, 3\]} } */
+}
+
+#ifdef __cplusplus
+}
+#endif

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64_bounds.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64_bounds.c
new file mode 100644 (file)
index 0000000..8be2b80
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u64_bounds.c
@@ -0,0 +1,19 @@
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+uint64x2_t
+foo (uint64_t a, uint64x2_t b)
+{
+  return vsetq_lane_u64 (a, b, 2); /* { dg-error {passing 2 to argument 3 of 'vsetq_lane_u64', which expects a value in the range \[0, 1\]} } */
+}
+
+#ifdef __cplusplus
+}
+#endif

diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8_bounds.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8_bounds.c
new file mode 100644 (file)
index 0000000..987dc98
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vsetq_lane_u8_bounds.c
@@ -0,0 +1,19 @@
+/* { dg-require-effective-target arm_v8_1m_mve_ok } */
+/* { dg-add-options arm_v8_1m_mve } */
+/* { dg-additional-options "-O2" } */
+
+#include "arm_mve.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+uint8x16_t
+foo (uint8_t a, uint8x16_t b)
+{
+  return vsetq_lane_u8 (a, b, 17); /* { dg-error {passing 17 to argument 3 of 'vsetq_lane_u8', which expects a value in the range \[0, 15\]} } */
+}
+
+#ifdef __cplusplus
+}
+#endif