]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
accel/amdxdna: Fix incorrect size of ERT_START_NPU commands
authorLizhi Hou <lizhi.hou@amd.com>
Wed, 9 Apr 2025 21:00:13 +0000 (14:00 -0700)
committerLizhi Hou <lizhi.hou@amd.com>
Thu, 10 Apr 2025 17:45:39 +0000 (10:45 -0700)
When multiple ERT_START_NPU commands are combined in one buffer, the
buffer size calculation is incorrect. Also, the condition to make sure
the buffer size is not beyond 4K is also fixed.

Fixes: aac243092b70 ("accel/amdxdna: Add command execution")
Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
Reviewed-by: Maciej Falkowski <maciej.falkowski@linux.intel.com>
Signed-off-by: Lizhi Hou <lizhi.hou@amd.com>
Link: https://lore.kernel.org/r/20250409210013.10854-1-lizhi.hou@amd.com
drivers/accel/amdxdna/aie2_message.c
drivers/accel/amdxdna/aie2_msg_priv.h

index bf4219e32cc19d92a7c44fafb70c0ae0bbb86e3b..82412eec9a4b8b430e248ff25c480265a4ef74b4 100644 (file)
@@ -525,7 +525,7 @@ aie2_cmdlist_fill_one_slot_cf(void *cmd_buf, u32 offset,
        if (!payload)
                return -EINVAL;
 
-       if (!slot_cf_has_space(offset, payload_len))
+       if (!slot_has_space(*buf, offset, payload_len))
                return -ENOSPC;
 
        buf->cu_idx = cu_idx;
@@ -558,7 +558,7 @@ aie2_cmdlist_fill_one_slot_dpu(void *cmd_buf, u32 offset,
        if (payload_len < sizeof(*sn) || arg_sz > MAX_DPU_ARGS_SIZE)
                return -EINVAL;
 
-       if (!slot_dpu_has_space(offset, arg_sz))
+       if (!slot_has_space(*buf, offset, arg_sz))
                return -ENOSPC;
 
        buf->inst_buf_addr = sn->buffer;
@@ -569,7 +569,7 @@ aie2_cmdlist_fill_one_slot_dpu(void *cmd_buf, u32 offset,
        memcpy(buf->args, sn->prop_args, arg_sz);
 
        /* Accurate buf size to hint firmware to do necessary copy */
-       *size += sizeof(*buf) + arg_sz;
+       *size = sizeof(*buf) + arg_sz;
        return 0;
 }
 
index 4e02e744b470ebbb8f2b624deed35c426bd74d01..6df9065b13f68593899ea78c60db0c050ad17f95 100644 (file)
@@ -319,18 +319,16 @@ struct async_event_msg_resp {
 } __packed;
 
 #define MAX_CHAIN_CMDBUF_SIZE SZ_4K
-#define slot_cf_has_space(offset, payload_size) \
-       (MAX_CHAIN_CMDBUF_SIZE - ((offset) + (payload_size)) > \
-        offsetof(struct cmd_chain_slot_execbuf_cf, args[0]))
+#define slot_has_space(slot, offset, payload_size)             \
+       (MAX_CHAIN_CMDBUF_SIZE >= (offset) + (payload_size) +   \
+        sizeof(typeof(slot)))
+
 struct cmd_chain_slot_execbuf_cf {
        __u32 cu_idx;
        __u32 arg_cnt;
        __u32 args[] __counted_by(arg_cnt);
 };
 
-#define slot_dpu_has_space(offset, payload_size) \
-       (MAX_CHAIN_CMDBUF_SIZE - ((offset) + (payload_size)) > \
-        offsetof(struct cmd_chain_slot_dpu, args[0]))
 struct cmd_chain_slot_dpu {
        __u64 inst_buf_addr;
        __u32 inst_size;