arm64: dts: qcom: sm8250: Fix interrupt types of camss interrupts

Qualcomm IP catalog says that all CAMSS interrupts is edge rising,
fix it in the CAMSS device tree node for sm8250 SoC.

Fixes: 30325603b910 ("arm64: dts: qcom: sm8250: camss: Add CAMSS block definition")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Link: https://lore.kernel.org/r/20241127122950.885982-7-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index d607a66a807c3b480ac33468ef88bc69bdd93d9c..c2937b4d9f180296733b6d7a7a16a088f1f96b76 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -4485,20 +4485,20 @@
                                    "vfe_lite0",
                                    "vfe_lite1";
 
-                       interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 86 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 89 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>;
                        interrupt-names = "csiphy0",
                                          "csiphy1",
                                          "csiphy2",