]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
net: stmmac: mdio: move stmmac_mdio_format_addr() into read/write
authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Thu, 4 Sep 2025 12:11:15 +0000 (13:11 +0100)
committerJakub Kicinski <kuba@kernel.org>
Tue, 9 Sep 2025 01:12:02 +0000 (18:12 -0700)
Move stmmac_mdio_format_addr() into stmmac_mdio_read() and
stmmac_mdio_write().

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Mohd Ayaan Anwar <quic_mohdayaa@quicinc.com>
Link: https://patch.msgid.link/E1uu8o7-00000001vom-1pN8@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c

index 4294262c208d50d2fe90406896ff99caa4b1303d..d588475b427942f72ffbd70c6ce3a9ed47e78cac 100644 (file)
@@ -240,16 +240,20 @@ static u32 stmmac_mdio_format_addr(struct stmmac_priv *priv,
               MII_BUSY;
 }
 
-static int stmmac_mdio_read(struct stmmac_priv *priv, int data, u32 value)
+static int stmmac_mdio_read(struct stmmac_priv *priv, unsigned int pa,
+                           unsigned int gr, u32 cmd, int data)
 {
        unsigned int mii_address = priv->hw->mii.addr;
        unsigned int mii_data = priv->hw->mii.data;
+       u32 value;
        int ret;
 
        ret = stmmac_mdio_wait(priv->ioaddr + mii_address, MII_BUSY);
        if (ret)
                return ret;
 
+       value = stmmac_mdio_format_addr(priv, pa, gr) | cmd;
+
        writel(data, priv->ioaddr + mii_data);
        writel(value, priv->ioaddr + mii_address);
 
@@ -275,17 +279,18 @@ static int stmmac_mdio_read_c22(struct mii_bus *bus, int phyaddr, int phyreg)
 {
        struct stmmac_priv *priv = netdev_priv(bus->priv);
        int data = 0;
-       u32 value;
+       u32 cmd;
 
        data = pm_runtime_resume_and_get(priv->device);
        if (data < 0)
                return data;
 
-       value = stmmac_mdio_format_addr(priv, phyaddr, phyreg);
        if (priv->plat->has_gmac4)
-               value |= MII_GMAC4_READ;
+               cmd = MII_GMAC4_READ;
+       else
+               cmd = 0;
 
-       data = stmmac_mdio_read(priv, data, value);
+       data = stmmac_mdio_read(priv, phyaddr, phyreg, cmd, data);
 
        pm_runtime_put(priv->device);
 
@@ -308,29 +313,29 @@ static int stmmac_mdio_read_c45(struct mii_bus *bus, int phyaddr, int devad,
 {
        struct stmmac_priv *priv = netdev_priv(bus->priv);
        int data = 0;
-       u32 value;
+       u32 cmd;
 
        data = pm_runtime_resume_and_get(priv->device);
        if (data < 0)
                return data;
 
-       value = stmmac_mdio_format_addr(priv, phyaddr, devad);
-       value |= MII_GMAC4_READ;
-       value |= MII_GMAC4_C45E;
+       cmd = MII_GMAC4_READ | MII_GMAC4_C45E;
 
        data |= phyreg << MII_GMAC4_REG_ADDR_SHIFT;
 
-       data = stmmac_mdio_read(priv, data, value);
+       data = stmmac_mdio_read(priv, phyaddr, devad, cmd, data);
 
        pm_runtime_put(priv->device);
 
        return data;
 }
 
-static int stmmac_mdio_write(struct stmmac_priv *priv, int data, u32 value)
+static int stmmac_mdio_write(struct stmmac_priv *priv, unsigned int pa,
+                            unsigned int gr, u32 cmd, int data)
 {
        unsigned int mii_address = priv->hw->mii.addr;
        unsigned int mii_data = priv->hw->mii.data;
+       u32 value;
        int ret;
 
        /* Wait until any existing MII operation is complete */
@@ -338,6 +343,8 @@ static int stmmac_mdio_write(struct stmmac_priv *priv, int data, u32 value)
        if (ret)
                return ret;
 
+       value = stmmac_mdio_format_addr(priv, pa, gr) | cmd;
+
        /* Set the MII address register to write */
        writel(data, priv->ioaddr + mii_data);
        writel(value, priv->ioaddr + mii_address);
@@ -359,19 +366,18 @@ static int stmmac_mdio_write_c22(struct mii_bus *bus, int phyaddr, int phyreg,
 {
        struct stmmac_priv *priv = netdev_priv(bus->priv);
        int ret, data = phydata;
-       u32 value;
+       u32 cmd;
 
        ret = pm_runtime_resume_and_get(priv->device);
        if (ret < 0)
                return ret;
 
-       value = stmmac_mdio_format_addr(priv, phyaddr, phyreg);
        if (priv->plat->has_gmac4)
-               value |= MII_GMAC4_WRITE;
+               cmd = MII_GMAC4_WRITE;
        else
-               value |= MII_WRITE;
+               cmd = MII_WRITE;
 
-       ret = stmmac_mdio_write(priv, data, value);
+       ret = stmmac_mdio_write(priv, phyaddr, phyreg, cmd, data);
 
        pm_runtime_put(priv->device);
 
@@ -392,19 +398,17 @@ static int stmmac_mdio_write_c45(struct mii_bus *bus, int phyaddr,
 {
        struct stmmac_priv *priv = netdev_priv(bus->priv);
        int ret, data = phydata;
-       u32 value;
+       u32 cmd;
 
        ret = pm_runtime_resume_and_get(priv->device);
        if (ret < 0)
                return ret;
 
-       value = stmmac_mdio_format_addr(priv, phyaddr, devad);
-       value |= MII_GMAC4_WRITE;
-       value |= MII_GMAC4_C45E;
+       cmd = MII_GMAC4_WRITE | MII_GMAC4_C45E;
 
        data |= phyreg << MII_GMAC4_REG_ADDR_SHIFT;
 
-       ret = stmmac_mdio_write(priv, data, value);
+       ret = stmmac_mdio_write(priv, phyaddr, devad, cmd, data);
 
        pm_runtime_put(priv->device);