+++ /dev/null
-From da36ef1273dd9bd9a06c554e84abf12b3157b6b6 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Fri, 25 Nov 2022 15:37:57 +0800
-Subject: memory: atmel-sdramc: Fix missing clk_disable_unprepare in
- atmel_ramc_probe()
-
-From: Gaosheng Cui <cuigaosheng1@huawei.com>
-
-[ Upstream commit 340cb392a038cf70540a4cdf2e98a247c66b6df4 ]
-
-The clk_disable_unprepare() should be called in the error handling
-of caps->has_mpddr_clk, fix it by replacing devm_clk_get and
-clk_prepare_enable by devm_clk_get_enabled.
-
-Fixes: e81b6abebc87 ("memory: add a driver for atmel ram controllers")
-Signed-off-by: Gaosheng Cui <cuigaosheng1@huawei.com>
-Link: https://lore.kernel.org/r/20221125073757.3535219-1-cuigaosheng1@huawei.com
-Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/memory/atmel-sdramc.c | 6 ++----
- 1 file changed, 2 insertions(+), 4 deletions(-)
-
-diff --git a/drivers/memory/atmel-sdramc.c b/drivers/memory/atmel-sdramc.c
-index b418b39af180..ae2c0b3fb552 100644
---- a/drivers/memory/atmel-sdramc.c
-+++ b/drivers/memory/atmel-sdramc.c
-@@ -59,19 +59,17 @@ static int atmel_ramc_probe(struct platform_device *pdev)
- caps = of_device_get_match_data(&pdev->dev);
-
- if (caps->has_ddrck) {
-- clk = devm_clk_get(&pdev->dev, "ddrck");
-+ clk = devm_clk_get_enabled(&pdev->dev, "ddrck");
- if (IS_ERR(clk))
- return PTR_ERR(clk);
-- clk_prepare_enable(clk);
- }
-
- if (caps->has_mpddr_clk) {
-- clk = devm_clk_get(&pdev->dev, "mpddr");
-+ clk = devm_clk_get_enabled(&pdev->dev, "mpddr");
- if (IS_ERR(clk)) {
- pr_err("AT91 RAMC: couldn't get mpddr clock\n");
- return PTR_ERR(clk);
- }
-- clk_prepare_enable(clk);
- }
-
- return 0;
---
-2.39.0
-
+++ /dev/null
-From c90a9e41db8d4938aa668da5bddbb4e4469a2d9e Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Thu, 20 Dec 2018 11:57:41 +0000
-Subject: mmc: sdhci-esdhc-imx: clear ESDHC_STD_TUNING_EN for manual tuning
- method
-
-From: BOUGH CHEN <haibo.chen@nxp.com>
-
-[ Upstream commit a98c557e2af3e12e38dee6019a5cf210156d629e ]
-
-The bit ESDHC_STD_TUNING_EN may be configed by bootloader code if it
-choose to use standard tuning method. So on linux side, if choose to
-use manual tuning method, need to clear the bit ESDHC_STD_TUNING_EN,
-remove the impact of bootloader code.
-
-Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
-Acked-by: Adrian Hunter <adrian.hunter@intel.com>
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Stable-dep-of: 1e336aa0c025 ("mmc: sdhci-esdhc-imx: correct the tuning start tap and step setting")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/mmc/host/sdhci-esdhc-imx.c | 9 +++++++++
- 1 file changed, 9 insertions(+)
-
-diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
-index f8a4791e64f8..71ca97c696b1 100644
---- a/drivers/mmc/host/sdhci-esdhc-imx.c
-+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
-@@ -1141,6 +1141,15 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host)
- << ESDHC_TUNING_STEP_SHIFT;
- }
- writel(tmp, host->ioaddr + ESDHC_TUNING_CTRL);
-+ } else if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) {
-+ /*
-+ * ESDHC_STD_TUNING_EN may be configed in bootloader
-+ * or ROM code, so clear this bit here to make sure
-+ * the manual tuning can work.
-+ */
-+ tmp = readl(host->ioaddr + ESDHC_TUNING_CTRL);
-+ tmp &= ~ESDHC_STD_TUNING_EN;
-+ writel(tmp, host->ioaddr + ESDHC_TUNING_CTRL);
- }
- }
- }
---
-2.39.0
-
+++ /dev/null
-From 621203bec98eef58da6ebe60418aa2fa71e2dd2b Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 19 Feb 2020 16:25:54 +0800
-Subject: mmc: sdhci-esdhc-imx: clear pending interrupt and halt cqhci
-
-From: Haibo Chen <haibo.chen@nxp.com>
-
-[ Upstream commit 982cf37da3ee0f1e3e20d97e19f13cba79be51c7 ]
-
-On i.MX8MM, we are running Dual Linux OS, with 1st Linux using SD Card
-as rootfs storage, 2nd Linux using eMMC as rootfs storage. We let the
-the 1st linux configure power/clock for the 2nd Linux.
-
-When the 2nd Linux is booting into rootfs stage, we let the 1st Linux
-to destroy the 2nd linux, then restart the 2nd linux, we met SDHCI dump
-as following, after we clear the pending interrupt and halt CQCTL, issue
-gone.
-
-[ 1.334594] mmc2: Got command interrupt 0x00000001 even though no command operation was in progress.
-[ 1.334595] mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
-[ 1.334599] mmc2: sdhci: Sys addr: 0xa05dcc00 | Version: 0x00000002
-[ 1.345538] mmc2: sdhci: Blk size: 0x00000200 | Blk cnt: 0x00000000
-[ 1.345541] mmc2: sdhci: Argument: 0x00018000 | Trn mode: 0x00000033
-[ 1.345543] mmc2: sdhci: Present: 0x01f88008 | Host ctl: 0x00000031
-[ 1.345547] mmc2: sdhci: Power: 0x00000002 | Blk gap: 0x00000080
-[ 1.357903] mmc2: sdhci: Wake-up: 0x00000008 | Clock: 0x0000003f
-[ 1.357905] mmc2: sdhci: Timeout: 0x0000008f | Int stat: 0x00000000
-[ 1.357908] mmc2: sdhci: Int enab: 0x107f100b | Sig enab: 0x107f100b
-[ 1.357911] mmc2: sdhci: AC12 err: 0x00000000 | Slot int: 0x00000502
-[ 1.370268] mmc2: sdhci: Caps: 0x07eb0000 | Caps_1: 0x0000b400
-[ 1.370270] mmc2: sdhci: Cmd: 0x00000d1a | Max curr: 0x00ffffff
-[ 1.370273] mmc2: sdhci: Resp[0]: 0x00000b00 | Resp[1]: 0xffffffff
-[ 1.370276] mmc2: sdhci: Resp[2]: 0x328f5903 | Resp[3]: 0x00d00f00
-[ 1.382132] mmc2: sdhci: Host ctl2: 0x00000000
-[ 1.382135] mmc2: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0xa2040208
-
-[ 2.060932] mmc2: Unexpected interrupt 0x00004000.
-[ 2.065538] mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
-[ 2.071720] mmc2: sdhci: Sys addr: 0x00000000 | Version: 0x00000002
-[ 2.077902] mmc2: sdhci: Blk size: 0x00000200 | Blk cnt: 0x00000001
-[ 2.084083] mmc2: sdhci: Argument: 0x00000000 | Trn mode: 0x00000000
-[ 2.090264] mmc2: sdhci: Present: 0x01f88009 | Host ctl: 0x00000011
-[ 2.096446] mmc2: sdhci: Power: 0x00000002 | Blk gap: 0x00000080
-[ 2.102627] mmc2: sdhci: Wake-up: 0x00000008 | Clock: 0x000010ff
-[ 2.108809] mmc2: sdhci: Timeout: 0x0000008f | Int stat: 0x00004000
-[ 2.114990] mmc2: sdhci: Int enab: 0x007f1003 | Sig enab: 0x007f1003
-[ 2.121171] mmc2: sdhci: AC12 err: 0x00000000 | Slot int: 0x00000502
-[ 2.127353] mmc2: sdhci: Caps: 0x07eb0000 | Caps_1: 0x0000b400
-[ 2.133534] mmc2: sdhci: Cmd: 0x0000371a | Max curr: 0x00ffffff
-[ 2.139715] mmc2: sdhci: Resp[0]: 0x00000900 | Resp[1]: 0xffffffff
-[ 2.145896] mmc2: sdhci: Resp[2]: 0x328f5903 | Resp[3]: 0x00d00f00
-[ 2.152077] mmc2: sdhci: Host ctl2: 0x00000000
-[ 2.156342] mmc2: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x00000000
-
-Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
-Acked-by: Adrian Hunter <adrian.hunter@intel.com>
-Link: https://lore.kernel.org/r/1582100757-20683-6-git-send-email-haibo.chen@nxp.com
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Stable-dep-of: 1e336aa0c025 ("mmc: sdhci-esdhc-imx: correct the tuning start tap and step setting")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/mmc/host/sdhci-esdhc-imx.c | 16 ++++++++++++++++
- 1 file changed, 16 insertions(+)
-
-diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
-index 71ca97c696b1..dc0a10a5e2c3 100644
---- a/drivers/mmc/host/sdhci-esdhc-imx.c
-+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
-@@ -1092,6 +1092,7 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host)
- {
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
-+ struct cqhci_host *cq_host = host->mmc->cqe_private;
- int tmp;
-
- if (esdhc_is_usdhc(imx_data)) {
-@@ -1151,6 +1152,21 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host)
- tmp &= ~ESDHC_STD_TUNING_EN;
- writel(tmp, host->ioaddr + ESDHC_TUNING_CTRL);
- }
-+
-+ /*
-+ * On i.MX8MM, we are running Dual Linux OS, with 1st Linux using SD Card
-+ * as rootfs storage, 2nd Linux using eMMC as rootfs storage. We let the
-+ * the 1st linux configure power/clock for the 2nd Linux.
-+ *
-+ * When the 2nd Linux is booting into rootfs stage, we let the 1st Linux
-+ * to destroy the 2nd linux, then restart the 2nd linux, we met SDHCI dump.
-+ * After we clear the pending interrupt and halt CQCTL, issue gone.
-+ */
-+ if (cq_host) {
-+ tmp = cqhci_readl(cq_host, CQHCI_IS);
-+ cqhci_writel(cq_host, tmp, CQHCI_IS);
-+ cqhci_writel(cq_host, CQHCI_HALT, CQHCI_CTL);
-+ }
- }
- }
-
---
-2.39.0
-
+++ /dev/null
-From 730ae5e3c6d1397618caab6b69d8b7b5df23da23 Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Wed, 7 Dec 2022 19:23:15 +0800
-Subject: mmc: sdhci-esdhc-imx: correct the tuning start tap and step setting
-
-From: Haibo Chen <haibo.chen@nxp.com>
-
-[ Upstream commit 1e336aa0c0250ec84c6f16efac40c9f0138e367d ]
-
-Current code logic may be impacted by the setting of ROM/Bootloader,
-so unmask these bits first, then setting these bits accordingly.
-
-Fixes: 2b16cf326b70 ("mmc: sdhci-esdhc-imx: move tuning static configuration into hwinit function")
-Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
-Acked-by: Adrian Hunter <adrian.hunter@intel.com>
-Cc: stable@vger.kernel.org
-Link: https://lore.kernel.org/r/20221207112315.1812222-1-haibo.chen@nxp.com
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/mmc/host/sdhci-esdhc-imx.c | 22 +++++++++++++++-------
- 1 file changed, 15 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
-index 30c75a96fce1..97ec4f870e11 100644
---- a/drivers/mmc/host/sdhci-esdhc-imx.c
-+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
-@@ -85,6 +85,7 @@
- #define ESDHC_TUNING_START_TAP_DEFAULT 0x1
- #define ESDHC_TUNING_START_TAP_MASK 0x7f
- #define ESDHC_TUNING_CMD_CRC_CHECK_DISABLE (1 << 7)
-+#define ESDHC_TUNING_STEP_DEFAULT 0x1
- #define ESDHC_TUNING_STEP_MASK 0x00070000
- #define ESDHC_TUNING_STEP_SHIFT 16
-
-@@ -1094,7 +1095,7 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host)
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct pltfm_imx_data *imx_data = sdhci_pltfm_priv(pltfm_host);
- struct cqhci_host *cq_host = host->mmc->cqe_private;
-- int tmp;
-+ u32 tmp;
-
- if (esdhc_is_usdhc(imx_data)) {
- /*
-@@ -1130,17 +1131,24 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host)
-
- if (imx_data->socdata->flags & ESDHC_FLAG_STD_TUNING) {
- tmp = readl(host->ioaddr + ESDHC_TUNING_CTRL);
-- tmp |= ESDHC_STD_TUNING_EN |
-- ESDHC_TUNING_START_TAP_DEFAULT;
-- if (imx_data->boarddata.tuning_start_tap) {
-- tmp &= ~ESDHC_TUNING_START_TAP_MASK;
-+ tmp |= ESDHC_STD_TUNING_EN;
-+
-+ /*
-+ * ROM code or bootloader may config the start tap
-+ * and step, unmask them first.
-+ */
-+ tmp &= ~(ESDHC_TUNING_START_TAP_MASK | ESDHC_TUNING_STEP_MASK);
-+ if (imx_data->boarddata.tuning_start_tap)
- tmp |= imx_data->boarddata.tuning_start_tap;
-- }
-+ else
-+ tmp |= ESDHC_TUNING_START_TAP_DEFAULT;
-
- if (imx_data->boarddata.tuning_step) {
-- tmp &= ~ESDHC_TUNING_STEP_MASK;
- tmp |= imx_data->boarddata.tuning_step
- << ESDHC_TUNING_STEP_SHIFT;
-+ } else {
-+ tmp |= ESDHC_TUNING_STEP_DEFAULT
-+ << ESDHC_TUNING_STEP_SHIFT;
- }
-
- /* Disable the CMD CRC check for tuning, if not, need to
---
-2.39.0
-
+++ /dev/null
-From 6a381e3ed356ba8d7a920f5638848aad3e63c9be Mon Sep 17 00:00:00 2001
-From: Sasha Levin <sashal@kernel.org>
-Date: Tue, 26 May 2020 18:22:02 +0800
-Subject: mmc: sdhci-esdhc-imx: disable the CMD CRC check for standard tuning
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-From: Haibo Chen <haibo.chen@nxp.com>
-
-[ Upstream commit 16e40e5b1e3c6646fd90d0c3186703d209216f03 ]
-
-In current code, we add 1ms dealy after each tuning command for standard
-tuning method. Adding this 1ms dealy is because USDHC default check the
-CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning
-IC logic do not wait for the tuning data sending out by the card, trigger
-the buffer read ready interrupt immediately, and step to next cycle. So
-when next time the new tuning command send out by USDHC, card may still
-not send out the tuning data of the upper command，then some eMMC cards
-may stuck, can't response to any command, block the whole tuning procedure.
-
-If do not check the CMD CRC for tuning, then do not has this issue. USDHC
-will wait for the tuning data of each tuning command and check them. If the
-tuning data pass the check, it also means the CMD line also okay for tuning.
-
-So this patch disable the CMD CRC check for tuning, save some time for the
-whole tuning procedure.
-
-Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
-Link: https://lore.kernel.org/r/1590488522-9292-2-git-send-email-haibo.chen@nxp.com
-Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
-Stable-dep-of: 1e336aa0c025 ("mmc: sdhci-esdhc-imx: correct the tuning start tap and step setting")
-Signed-off-by: Sasha Levin <sashal@kernel.org>
----
- drivers/mmc/host/sdhci-esdhc-imx.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
-diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
-index dc0a10a5e2c3..30c75a96fce1 100644
---- a/drivers/mmc/host/sdhci-esdhc-imx.c
-+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
-@@ -84,6 +84,7 @@
- /* NOTE: the minimum valid tuning start tap for mx6sl is 1 */
- #define ESDHC_TUNING_START_TAP_DEFAULT 0x1
- #define ESDHC_TUNING_START_TAP_MASK 0x7f
-+#define ESDHC_TUNING_CMD_CRC_CHECK_DISABLE (1 << 7)
- #define ESDHC_TUNING_STEP_MASK 0x00070000
- #define ESDHC_TUNING_STEP_SHIFT 16
-
-@@ -1141,6 +1142,18 @@ static void sdhci_esdhc_imx_hwinit(struct sdhci_host *host)
- tmp |= imx_data->boarddata.tuning_step
- << ESDHC_TUNING_STEP_SHIFT;
- }
-+
-+ /* Disable the CMD CRC check for tuning, if not, need to
-+ * add some delay after every tuning command, because
-+ * hardware standard tuning logic will directly go to next
-+ * step once it detect the CMD CRC error, will not wait for
-+ * the card side to finally send out the tuning data, trigger
-+ * the buffer read ready interrupt immediately. If usdhc send
-+ * the next tuning command some eMMC card will stuck, can't
-+ * response, block the tuning procedure or the first command
-+ * after the whole tuning procedure always can't get any response.
-+ */
-+ tmp |= ESDHC_TUNING_CMD_CRC_CHECK_DISABLE;
- writel(tmp, host->ioaddr + ESDHC_TUNING_CTRL);
- } else if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) {
- /*
---
-2.39.0
-
-memory-atmel-sdramc-fix-missing-clk_disable_unprepar.patch
memory-mvebu-devbus-fix-missing-clk_disable_unprepar.patch
arm-dts-imx6qdl-gw560x-remove-incorrect-uart-has-rts.patch
hid-intel_ish-hid-add-check-for-ishtp_dma_tx_map.patch
tcp-avoid-the-lookup-process-failing-to-get-sk-in-eh.patch
w1-fix-deadloop-in-__w1_remove_master_device.patch
w1-fix-warning-after-calling-w1_process.patch
-mmc-sdhci-esdhc-imx-clear-esdhc_std_tuning_en-for-ma.patch
-mmc-sdhci-esdhc-imx-clear-pending-interrupt-and-halt.patch
-mmc-sdhci-esdhc-imx-disable-the-cmd-crc-check-for-st.patch
-mmc-sdhci-esdhc-imx-correct-the-tuning-start-tap-and.patch
netfilter-conntrack-do-not-renew-entry-stuck-in-tcp-.patch
block-fix-and-cleanup-bio_check_ro.patch
perf-env-do-not-return-pointers-to-local-variables.patch
docs-fix-path-paste-o-for-sys-kernel-warn_count.patch
exit-use-read_once-for-all-oops-warn-limit-reads.patch
ipv6-ensure-sane-device-mtu-in-tunnels.patch
+usb-host-xhci-plat-add-wakeup-entry-at-sysfs.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
