sysv4.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Define.

        * config/rs6000/sysv4.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Define.
        * config/rs6000/power4.md (power4-store,power4-vecstore): New
        insn reservations.
        (power4-fpstore): Compact.

From-SVN: r63167

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d3871f87b9d0212c9a9b819fa02a85f27f9e1eb1..0bdc28dd7a6689417ac3f9c2a279225eef37599c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2003-02-20  David Edelsohn  <edelsohn@gnu.org>
+
+        * config/rs6000/sysv4.h (ASM_OUTPUT_MAX_SKIP_ALIGN): Define.
+        * config/rs6000/power4.md (power4-store,power4-vecstore): New
+       insn reservations.
+       (power4-fpstore): Compact.
+
 2003-02-20  Kazu Hirata  <kazu@cs.umass.edu>
 
        * config/h8300/h8300.md (*iorsi3_w): New.

diff --git a/gcc/config/rs6000/power4.md b/gcc/config/rs6000/power4.md
index 609ef1c29dbc198dd4fadf409a876357110cec59..87e5ef4c8ec5003f5e8abb8cfd0aadd3df19932d 100644 (file)
--- a/gcc/config/rs6000/power4.md
+++ b/gcc/config/rs6000/power4.md
@@ -127,9 +127,10 @@
   "lsq_power4")
 
 (define_insn_reservation "power4-store" 1
-  (and (eq_attr "type" "store,vecstore")
+  (and (eq_attr "type" "store")
        (eq_attr "cpu" "power4"))
-  "lsq_power4")
+  "((du1_power4|du4_power4),lsu1_power4,iu2_power4)\
+  |((du2_power4|du3_power4),lsu2_power4,iu1_power4)")
 
 (define_insn_reservation "power4-store-update" 1
   (and (eq_attr "type" "store_u")
@@ -144,10 +145,8 @@
 (define_insn_reservation "power4-fpstore" 1
   (and (eq_attr "type" "fpstore")
        (eq_attr "cpu" "power4"))
-  "(du1_power4,fpu1_power4,lsu1_power4)\
-  |(du2_power4,fpu2_power4,lsu2_power4)\
-  |(du3_power4,fpu2_power4,lsu2_power4)\
-  |(du4_power4,fpu1_power4,lsu1_power4)")
+  "((du1_power4|du4_power4),lsu1_power4,fpu1_power4)\
+  |((du2_power4|du3_power4),lsu2_power4,fpu2_power4)")
 
 (define_insn_reservation "power4-fpstore-update" 1
   (and (eq_attr "type" "fpstore_u")
@@ -163,6 +162,12 @@
   "(du1_power4+du2_power4+du3_power4+du4_power4),
    iu1_power4,fpu2_power4,(iu2_power4+lsu2_power4)")
 
+(define_insn_reservation "power4-vecstore" 1
+  (and (eq_attr "type" "vecstore")
+       (eq_attr "cpu" "power4"))
+  "((du1_power4|du4_power4),lsu1_power4,vec_power4)\
+  |((du2_power4|du3_power4),lsu2_power4,vec_power4)")
+
 
 ; Integer latency is 2 cycles
 (define_insn_reservation "power4-integer" 2

diff --git a/gcc/config/rs6000/sysv4.h b/gcc/config/rs6000/sysv4.h
index b5a7f7b966c4029c5bd977a7a173393e38fef728..503deaf398ae8e038752fe85d6f7949ede2718d3 100644 (file)
--- a/gcc/config/rs6000/sysv4.h
+++ b/gcc/config/rs6000/sysv4.h
@@ -692,6 +692,20 @@ do {                                                                       \
   ASM_OUTPUT_ALIGNED_LOCAL (FILE, NAME, SIZE, ALIGN);                  \
 } while (0)
 
+#ifdef HAVE_GAS_MAX_SKIP_P2ALIGN
+/* To support -falign-* switches we need to use .p2align so
+   that alignment directives in code sections will be padded
+   with no-op instructions, rather than zeroes.  */
+#define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE,LOG,MAX_SKIP)                   \
+  if ((LOG) != 0)                                                      \
+    {                                                                  \
+      if ((MAX_SKIP) == 0)                                             \
+       fprintf ((FILE), "\t.p2align %d\n", (LOG));                     \
+      else                                                             \
+       fprintf ((FILE), "\t.p2align %d,,%d\n", (LOG), (MAX_SKIP));     \
+    }
+#endif
+
 /* This is how to output code to push a register on the stack.
    It need not be very fast code.