firewire: ohci: use guard macro to serialize accesses to phy registers

The 1394 OHCI driver protects concurrent accesses to phy registers by
mutex object in fw_ohci structure.

This commit uses guard macro to maintain the mutex.

Link: https://lore.kernel.org/r/20240805085408.251763-5-o-takashi@sakamocchi.jp
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>

diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index 8f2bbd0569fb4c3f8b2d2e703b498e71ea414138..1461e008d265701e9ce74d5b3ddd32a4dbd67e64 100644 (file)
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -713,26 +713,20 @@ static int read_paged_phy_reg(struct fw_ohci *ohci, int page, int addr)
 static int ohci_read_phy_reg(struct fw_card *card, int addr)
 {
        struct fw_ohci *ohci = fw_ohci(card);
-       int ret;
 
-       mutex_lock(&ohci->phy_reg_mutex);
-       ret = read_phy_reg(ohci, addr);
-       mutex_unlock(&ohci->phy_reg_mutex);
+       guard(mutex)(&ohci->phy_reg_mutex);
 
-       return ret;
+       return read_phy_reg(ohci, addr);
 }
 
 static int ohci_update_phy_reg(struct fw_card *card, int addr,
                               int clear_bits, int set_bits)
 {
        struct fw_ohci *ohci = fw_ohci(card);
-       int ret;
 
-       mutex_lock(&ohci->phy_reg_mutex);
-       ret = update_phy_reg(ohci, addr, clear_bits, set_bits);
-       mutex_unlock(&ohci->phy_reg_mutex);
+       guard(mutex)(&ohci->phy_reg_mutex);
 
-       return ret;
+       return update_phy_reg(ohci, addr, clear_bits, set_bits);
 }
 
 static inline dma_addr_t ar_buffer_bus(struct ar_context *ctx, unsigned int i)
@@ -1882,13 +1876,15 @@ static int get_status_for_port(struct fw_ohci *ohci, int port_index,
 {
        int reg;
 
-       mutex_lock(&ohci->phy_reg_mutex);
-       reg = write_phy_reg(ohci, 7, port_index);
-       if (reg >= 0)
+       scoped_guard(mutex, &ohci->phy_reg_mutex) {
+               reg = write_phy_reg(ohci, 7, port_index);
+               if (reg < 0)
+                       return reg;
+
                reg = read_phy_reg(ohci, 8);
-       mutex_unlock(&ohci->phy_reg_mutex);
-       if (reg < 0)
-               return reg;
+               if (reg < 0)
+                       return reg;
+       }
 
        switch (reg & 0x0f) {
        case 0x06:
@@ -1929,26 +1925,31 @@ static int get_self_id_pos(struct fw_ohci *ohci, u32 self_id,
 static bool initiated_reset(struct fw_ohci *ohci)
 {
        int reg;
-       int ret = false;
 
-       mutex_lock(&ohci->phy_reg_mutex);
-       reg = write_phy_reg(ohci, 7, 0xe0); /* Select page 7 */
-       if (reg >= 0) {
-               reg = read_phy_reg(ohci, 8);
-               reg |= 0x40;
-               reg = write_phy_reg(ohci, 8, reg); /* set PMODE bit */
-               if (reg >= 0) {
-                       reg = read_phy_reg(ohci, 12); /* read register 12 */
-                       if (reg >= 0) {
-                               if ((reg & 0x08) == 0x08) {
-                                       /* bit 3 indicates "initiated reset" */
-                                       ret = true;
-                               }
-                       }
-               }
-       }
-       mutex_unlock(&ohci->phy_reg_mutex);
-       return ret;
+       guard(mutex)(&ohci->phy_reg_mutex);
+
+       // Select page 7
+       reg = write_phy_reg(ohci, 7, 0xe0);
+       if (reg < 0)
+               return reg;
+
+       reg = read_phy_reg(ohci, 8);
+       if (reg < 0)
+               return reg;
+
+       // set PMODE bit
+       reg |= 0x40;
+       reg = write_phy_reg(ohci, 8, reg);
+       if (reg < 0)
+               return reg;
+
+       // read register 12
+       reg = read_phy_reg(ohci, 12);
+       if (reg < 0)
+               return reg;
+
+       // bit 3 indicates "initiated reset"
+       return !!((reg & 0x08) == 0x08);
 }
 
 /*