arm64: dts: renesas: r8a77961: Add GX6250 GPU node

Describe Imagination Technologies PowerVR Rogue GX6250 BNVC 4.45.2.58
present in Renesas R-Car R8A77961 M3-W+ SoC.

Acked-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251022033847.471106-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
index 12435ad9adc04894a96b6bda98f3b1d5e8c4c720..31b11bdab69b9e9b8cf323602aefb8451fda3dd8 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi
@@ -2455,6 +2455,23 @@
                        resets = <&cpg 408>;
                };
 
+               gpu: gpu@fd000000 {
+                       compatible = "renesas,r8a77961-gpu",
+                                    "img,img-gx6250",
+                                    "img,img-rogue";
+                       reg = <0 0xfd000000 0 0x40000>;
+                       interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_CORE R8A77961_CLK_ZG>,
+                                <&cpg CPG_CORE R8A77961_CLK_S2D1>,
+                                <&cpg CPG_MOD 112>;
+                       clock-names = "core", "mem", "sys";
+                       power-domains = <&sysc R8A77961_PD_3DG_A>,
+                                       <&sysc R8A77961_PD_3DG_B>;
+                       power-domain-names = "a", "b";
+                       resets = <&cpg 112>;
+                       status = "disabled";
+               };
+
                pciec0: pcie@fe000000 {
                        compatible = "renesas,pcie-r8a77961",
                                     "renesas,pcie-rcar-gen3";