ARM: renesas: Put common r7s72100 code in board/renesas/common

Break out SoC specific code from the GR-Peach board and put it into the
board/renesas/common directory so it can be easily shared between the
GR-Peach and Genmai boards.

Signed-off-by: Magnus Damm <damm@opensource.se>

diff --git a/board/renesas/common/Makefile b/board/renesas/common/Makefile
index 5e51b691178b453bca7fbfafa17ae26c09546661..1849c995aee0259dfa1b09d8180b889fd9d9916e 100644 (file)
--- a/board/renesas/common/Makefile
+++ b/board/renesas/common/Makefile
@@ -5,6 +5,7 @@
 #
 
 # R-Car SoCs
+ifndef CONFIG_RZA1
 ifndef CONFIG_RZG2L
 
 # 32 bit SoCs
@@ -45,3 +46,10 @@ endif
 endif
 
 endif
+endif
+
+# RZ/A1 SoCs
+ifdef CONFIG_RZA1
+obj-y  += rza1-common.o
+obj-y  += rza1-lowlevel_init.o
+endif

diff --git a/board/renesas/common/rza1-common.c b/board/renesas/common/rza1-common.c
new file mode 100644 (file)
index 0000000..5027319
--- /dev/null
+++ b/board/renesas/common/rza1-common.c
@@ -0,0 +1,27 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2017 Renesas Electronics
+ * Copyright (C) Chris Brandt
+ */
+
+#include <init.h>
+#include <asm/io.h>
+
+#define RZA1_WDT_BASE  0xfcfe0000
+#define WTCSR          0x00
+#define WTCNT          0x02
+#define WRCSR          0x04
+
+void __weak reset_cpu(void)
+{
+       /* Dummy read (must read WRCSR:WOVF at least once before clearing) */
+       readb(RZA1_WDT_BASE + WRCSR);
+
+       writew(0xa500, RZA1_WDT_BASE + WRCSR);
+       writew(0x5a5f, RZA1_WDT_BASE + WRCSR);
+       writew(0x5a00, RZA1_WDT_BASE + WTCNT);
+       writew(0xa578, RZA1_WDT_BASE + WTCSR);
+
+       for (;;)
+               asm volatile("wfi");
+}

diff --git a/board/renesas/grpeach/lowlevel_init.S b/board/renesas/common/rza1-lowlevel_init.S
similarity index 100%
rename from board/renesas/grpeach/lowlevel_init.S
rename to board/renesas/common/rza1-lowlevel_init.S

diff --git a/board/renesas/grpeach/Makefile b/board/renesas/grpeach/Makefile
index 48e185ce3e856eedb0502482e34e5d5a83eb8816..89f8e0e8544075a01952267b1c204747ad0fb9bf 100644 (file)
--- a/board/renesas/grpeach/Makefile
+++ b/board/renesas/grpeach/Makefile
@@ -5,4 +5,3 @@
 # SPDX-License-Identifier:     GPL-2.0+
 
 obj-y  := grpeach.o
-obj-y  += lowlevel_init.o

diff --git a/board/renesas/grpeach/grpeach.c b/board/renesas/grpeach/grpeach.c
index 88f65c3b6a07ba615e33d66edd5a8081694b4a12..3a6393fdce1cc468d1589038ac4deb50f8719651 100644 (file)
--- a/board/renesas/grpeach/grpeach.c
+++ b/board/renesas/grpeach/grpeach.c
@@ -4,17 +4,9 @@
  * Copyright (C) Chris Brandt
  */
 
-#include <cpu_func.h>
 #include <errno.h>
 #include <init.h>
 #include <asm/global_data.h>
-#include <asm/io.h>
-#include <asm/arch/sys_proto.h>
-
-#define RZA1_WDT_BASE  0xfcfe0000
-#define WTCSR          0x00
-#define WTCNT          0x02
-#define WRCSR          0x04
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -39,17 +31,3 @@ int dram_init_banksize(void)
 
        return 0;
 }
-
-void reset_cpu(void)
-{
-       /* Dummy read (must read WRCSR:WOVF at least once before clearing) */
-       readb(RZA1_WDT_BASE + WRCSR);
-
-       writew(0xa500, RZA1_WDT_BASE + WRCSR);
-       writew(0x5a5f, RZA1_WDT_BASE + WRCSR);
-       writew(0x5a00, RZA1_WDT_BASE + WTCNT);
-       writew(0xa578, RZA1_WDT_BASE + WTCSR);
-
-       for (;;)
-               asm volatile("wfi");
-}