--- /dev/null
+From b6e0e543f75729f207b9c72b0162ae61170635b2 Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Sun, 21 Oct 2012 12:52:39 +0200
+Subject: drm/i915: clear the entire sdvo infoframe buffer
+
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit b6e0e543f75729f207b9c72b0162ae61170635b2 upstream.
+
+Like in the case of native hdmi, which is fixed already in
+
+commit adf00b26d18e1b3570451296e03bcb20e4798cdd
+Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
+Date: Tue Sep 25 13:23:34 2012 -0300
+
+ drm/i915: make sure we write all the DIP data bytes
+
+we need to clear the entire sdvo buffer to avoid upsetting the
+display.
+
+Since infoframe buffer writing is now a bit more elaborate, extract it
+into it's own function. This will be useful if we ever get around to
+properly update the ELD for sdvo. Also #define proper names for the
+two buffer indexes with fixed usage.
+
+v2: Cite the right commit above, spotted by Paulo Zanoni.
+
+v3: I'm too stupid to paste the right commit.
+
+v4: Ben Hutchings noticed that I've failed to handle an underflow in
+my loop logic, breaking it for i >= length + 8. Since I've just lost C
+programmer license, use his solution. Also, make the frustrated 0-base
+buffer size a notch more clear.
+
+Reported-and-tested-by: Jürg Billeter <j@bitron.ch>
+Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=25732
+Cc: Paulo Zanoni <przanoni@gmail.com>
+Cc: Ben Hutchings <ben@decadent.org.uk>
+Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_sdvo.c | 62 ++++++++++++++++++++++-----------
+ drivers/gpu/drm/i915/intel_sdvo_regs.h | 2 +
+ 2 files changed, 44 insertions(+), 20 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_sdvo.c
++++ b/drivers/gpu/drm/i915/intel_sdvo.c
+@@ -882,6 +882,45 @@ static void intel_sdvo_dump_hdmi_buf(str
+ }
+ #endif
+
++static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
++ unsigned if_index, uint8_t tx_rate,
++ uint8_t *data, unsigned length)
++{
++ uint8_t set_buf_index[2] = { if_index, 0 };
++ uint8_t hbuf_size, tmp[8];
++ int i;
++
++ if (!intel_sdvo_set_value(intel_sdvo,
++ SDVO_CMD_SET_HBUF_INDEX,
++ set_buf_index, 2))
++ return false;
++
++ if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
++ &hbuf_size, 1))
++ return false;
++
++ /* Buffer size is 0 based, hooray! */
++ hbuf_size++;
++
++ DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
++ if_index, length, hbuf_size);
++
++ for (i = 0; i < hbuf_size; i += 8) {
++ memset(tmp, 0, 8);
++ if (i < length)
++ memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
++
++ if (!intel_sdvo_set_value(intel_sdvo,
++ SDVO_CMD_SET_HBUF_DATA,
++ tmp, 8))
++ return false;
++ }
++
++ return intel_sdvo_set_value(intel_sdvo,
++ SDVO_CMD_SET_HBUF_TXRATE,
++ &tx_rate, 1);
++}
++
+ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
+ {
+ struct dip_infoframe avi_if = {
+@@ -889,11 +928,7 @@ static bool intel_sdvo_set_avi_infoframe
+ .ver = DIP_VERSION_AVI,
+ .len = DIP_LEN_AVI,
+ };
+- uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
+- uint8_t set_buf_index[2] = { 1, 0 };
+ uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
+- uint64_t *data = (uint64_t *)sdvo_data;
+- unsigned i;
+
+ intel_dip_infoframe_csum(&avi_if);
+
+@@ -903,22 +938,9 @@ static bool intel_sdvo_set_avi_infoframe
+ sdvo_data[3] = avi_if.checksum;
+ memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
+
+- if (!intel_sdvo_set_value(intel_sdvo,
+- SDVO_CMD_SET_HBUF_INDEX,
+- set_buf_index, 2))
+- return false;
+-
+- for (i = 0; i < sizeof(sdvo_data); i += 8) {
+- if (!intel_sdvo_set_value(intel_sdvo,
+- SDVO_CMD_SET_HBUF_DATA,
+- data, 8))
+- return false;
+- data++;
+- }
+-
+- return intel_sdvo_set_value(intel_sdvo,
+- SDVO_CMD_SET_HBUF_TXRATE,
+- &tx_rate, 1);
++ return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
++ SDVO_HBUF_TX_VSYNC,
++ sdvo_data, sizeof(sdvo_data));
+ }
+
+ static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
+--- a/drivers/gpu/drm/i915/intel_sdvo_regs.h
++++ b/drivers/gpu/drm/i915/intel_sdvo_regs.h
+@@ -708,6 +708,8 @@ struct intel_sdvo_enhancements_arg {
+ #define SDVO_CMD_SET_AUDIO_STAT 0x91
+ #define SDVO_CMD_GET_AUDIO_STAT 0x92
+ #define SDVO_CMD_SET_HBUF_INDEX 0x93
++ #define SDVO_HBUF_INDEX_ELD 0
++ #define SDVO_HBUF_INDEX_AVI_IF 1
+ #define SDVO_CMD_GET_HBUF_INDEX 0x94
+ #define SDVO_CMD_GET_HBUF_INFO 0x95
+ #define SDVO_CMD_SET_HBUF_AV_SPLIT 0x96
--- /dev/null
+From a9193983f4f292a82a00c72971c17ec0ee8c6c15 Mon Sep 17 00:00:00 2001
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Mon, 22 Oct 2012 12:55:55 +0200
+Subject: drm/i915: fix overlay on i830M
+
+From: Daniel Vetter <daniel.vetter@ffwll.ch>
+
+commit a9193983f4f292a82a00c72971c17ec0ee8c6c15 upstream.
+
+The overlay on the i830M has a peculiar failure mode: It works the
+first time around after boot-up, but consistenly hangs the second time
+it's used.
+
+Chris Wilson has dug out a nice errata:
+
+"1.5.12 Clock Gating Disable for Display Register
+Address Offset: 06200h–06203h
+
+"Bit 3
+Ovrunit Clock Gating Disable.
+0 = Clock gating controlled by unit enabling logic
+1 = Disable clock gating function
+DevALM Errata ALM049: Overlay Clock Gating Must be Disabled: Overlay
+& L2 Cache clock gating must be disabled in order to prevent device
+hangs when turning off overlay.SW must turn off Ovrunit clock gating
+(6200h) and L2 Cache clock gating (C8h)."
+
+Now I've nowhere found that 0xc8 register and hence couldn't apply the
+l2 cache workaround. But I've remembered that part of the magic that
+the OVERLAY_ON/OFF commands are supposed to do is to rearrange cache
+allocations so that the overlay scaler has some scratch space.
+
+And while pondering how that could explain the hang the 2nd time we
+enable the overlay, I've remembered that the old ums overlay code did
+_not_ issue the OVERLAY_OFF cmd.
+
+And indeed, disabling the OFF cmd results in the overlay working
+flawlessly, so I guess we can workaround the lack of the above
+workaround by simply never disabling the overlay engine once it's
+enabled.
+
+Note that we have the first part of the above w/a already implemented
+in i830_init_clock_gating - leave that as-is to avoid surprises.
+
+v2: Add a comment in the code.
+
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47827
+Tested-by: Rhys <rhyspuk@gmail.com>
+Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_overlay.c | 14 +++++++++++---
+ 1 file changed, 11 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/i915/intel_overlay.c
++++ b/drivers/gpu/drm/i915/intel_overlay.c
+@@ -431,9 +431,17 @@ static int intel_overlay_off(struct inte
+ intel_ring_emit(ring, flip_addr);
+ intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
+ /* turn overlay off */
+- intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_OFF);
+- intel_ring_emit(ring, flip_addr);
+- intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
++ if (IS_I830(dev)) {
++ /* Workaround: Don't disable the overlay fully, since otherwise
++ * it dies on the next OVERLAY_ON cmd. */
++ intel_ring_emit(ring, MI_NOOP);
++ intel_ring_emit(ring, MI_NOOP);
++ intel_ring_emit(ring, MI_NOOP);
++ } else {
++ intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_OFF);
++ intel_ring_emit(ring, flip_addr);
++ intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP);
++ }
+ intel_ring_advance(ring);
+
+ return intel_overlay_do_wait_request(overlay, request,
--- /dev/null
+From 1623392af9da983f3ad088a75076c9da05e5600d Mon Sep 17 00:00:00 2001
+From: Chris Wilson <chris@chris-wilson.co.uk>
+Date: Fri, 26 Oct 2012 12:06:41 +0100
+Subject: drm/i915: Only kick out vesafb if we takeover the fbcon with KMS
+
+From: Chris Wilson <chris@chris-wilson.co.uk>
+
+commit 1623392af9da983f3ad088a75076c9da05e5600d upstream.
+
+Otherwise we may remove the only console for a nomodeset system.
+
+We became more aggressive in our kicking with
+commit e188719a2891f01b3100dca4ae3a055fb5a7ab52
+Author: Daniel Vetter <daniel.vetter@ffwll.ch>
+Date: Tue Jun 12 11:28:17 2012 +0200
+
+ drm/i915: kick any firmware framebuffers before claiming the gtt
+
+Reported-and-tested-by: monnier@iro.umontreal.ca
+Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54615
+Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/i915_dma.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/gpu/drm/i915/i915_dma.c
++++ b/drivers/gpu/drm/i915/i915_dma.c
+@@ -1484,7 +1484,8 @@ int i915_driver_load(struct drm_device *
+ goto put_gmch;
+ }
+
+- i915_kick_out_firmware_fb(dev_priv);
++ if (drm_core_check_feature(dev, DRIVER_MODESET))
++ i915_kick_out_firmware_fb(dev_priv);
+
+ pci_set_master(dev->pdev);
+
--- /dev/null
+From 83325d072185899b706de2956170b246585aaec9 Mon Sep 17 00:00:00 2001
+From: Egbert Eich <eich@suse.de>
+Date: Wed, 24 Oct 2012 18:29:49 +0200
+Subject: DRM/Radeon: Fix Load Detection on legacy primary DAC.
+
+From: Egbert Eich <eich@suse.de>
+
+commit 83325d072185899b706de2956170b246585aaec9 upstream.
+
+An uninitialized variable led to broken load detection.
+
+Signed-off-by: Egbert Eich <eich@suse.de>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
++++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+@@ -651,6 +651,7 @@ static enum drm_connector_status radeon_
+ tmp |= RADEON_DAC_RANGE_CNTL_PS2 | RADEON_DAC_CMP_EN;
+ WREG32(RADEON_DAC_CNTL, tmp);
+
++ tmp = dac_macro_cntl;
+ tmp &= ~(RADEON_DAC_PDWN_R |
+ RADEON_DAC_PDWN_G |
+ RADEON_DAC_PDWN_B);
--- /dev/null
+From 3916e1d71b62b120888aa50bcc8d9a6200fc19a7 Mon Sep 17 00:00:00 2001
+From: Dave Airlie <airlied@redhat.com>
+Date: Thu, 1 Nov 2012 13:47:09 +1000
+Subject: drm/udl: fix stride issues scanning out stride != width*bpp
+
+From: Dave Airlie <airlied@redhat.com>
+
+commit 3916e1d71b62b120888aa50bcc8d9a6200fc19a7 upstream.
+
+When buffer sharing with the i915 and using a 1680x1050 monitor,
+the i915 gives is a 6912 buffer for the 6720 width, the code doesn't
+render this properly as it uses one value to set the base address for
+reading from the vmap and for where to start on the device.
+
+This fixes it by calculating the values correctly for the device and
+for the pixmap. No idea how I haven't seen this before now.
+
+Signed-off-by: Dave Airlie <airlied@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/udl/udl_drv.h | 2 +-
+ drivers/gpu/drm/udl/udl_fb.c | 12 +++++++-----
+ drivers/gpu/drm/udl/udl_transfer.c | 5 +++--
+ 3 files changed, 11 insertions(+), 8 deletions(-)
+
+--- a/drivers/gpu/drm/udl/udl_drv.h
++++ b/drivers/gpu/drm/udl/udl_drv.h
+@@ -104,7 +104,7 @@ udl_fb_user_fb_create(struct drm_device
+
+ int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr,
+ const char *front, char **urb_buf_ptr,
+- u32 byte_offset, u32 byte_width,
++ u32 byte_offset, u32 device_byte_offset, u32 byte_width,
+ int *ident_ptr, int *sent_ptr);
+
+ int udl_dumb_create(struct drm_file *file_priv,
+--- a/drivers/gpu/drm/udl/udl_fb.c
++++ b/drivers/gpu/drm/udl/udl_fb.c
+@@ -114,9 +114,10 @@ static void udlfb_dpy_deferred_io(struct
+ list_for_each_entry(cur, &fbdefio->pagelist, lru) {
+
+ if (udl_render_hline(dev, (ufbdev->ufb.base.bits_per_pixel / 8),
+- &urb, (char *) info->fix.smem_start,
+- &cmd, cur->index << PAGE_SHIFT,
+- PAGE_SIZE, &bytes_identical, &bytes_sent))
++ &urb, (char *) info->fix.smem_start,
++ &cmd, cur->index << PAGE_SHIFT,
++ cur->index << PAGE_SHIFT,
++ PAGE_SIZE, &bytes_identical, &bytes_sent))
+ goto error;
+ bytes_rendered += PAGE_SIZE;
+ }
+@@ -187,10 +188,11 @@ int udl_handle_damage(struct udl_framebu
+ for (i = y; i < y + height ; i++) {
+ const int line_offset = fb->base.pitches[0] * i;
+ const int byte_offset = line_offset + (x * bpp);
+-
++ const int dev_byte_offset = (fb->base.width * bpp * i) + (x * bpp);
+ if (udl_render_hline(dev, bpp, &urb,
+ (char *) fb->obj->vmapping,
+- &cmd, byte_offset, width * bpp,
++ &cmd, byte_offset, dev_byte_offset,
++ width * bpp,
+ &bytes_identical, &bytes_sent))
+ goto error;
+ }
+--- a/drivers/gpu/drm/udl/udl_transfer.c
++++ b/drivers/gpu/drm/udl/udl_transfer.c
+@@ -213,11 +213,12 @@ static void udl_compress_hline16(
+ */
+ int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr,
+ const char *front, char **urb_buf_ptr,
+- u32 byte_offset, u32 byte_width,
++ u32 byte_offset, u32 device_byte_offset,
++ u32 byte_width,
+ int *ident_ptr, int *sent_ptr)
+ {
+ const u8 *line_start, *line_end, *next_pixel;
+- u32 base16 = 0 + (byte_offset / bpp) * 2;
++ u32 base16 = 0 + (device_byte_offset / bpp) * 2;
+ struct urb *urb = *urb_ptr;
+ u8 *cmd = *urb_buf_ptr;
+ u8 *cmd_end = (u8 *) urb->transfer_buffer + urb->transfer_buffer_length;
mac80211-use-blacklist-for-duplicate-ie-check.patch
mac80211-only-process-mesh-config-header-on-frames-that-ra_match.patch
mac80211-don-t-inspect-sequence-control-field-on-control-frames.patch
+drm-radeon-fix-load-detection-on-legacy-primary-dac.patch
+drm-udl-fix-stride-issues-scanning-out-stride-width-bpp.patch
+drm-i915-clear-the-entire-sdvo-infoframe-buffer.patch
+drm-i915-fix-overlay-on-i830m.patch
+drm-i915-only-kick-out-vesafb-if-we-takeover-the-fbcon-with-kms.patch
projects / thirdparty / kernel / stable-queue.git / commitdiff
