3.10-stable patches

added patches:
	drm-i915-read-head-register-back-in-init_ring_common-to-enforce-ordering.patch

diff --git a/queue-3.10/drm-i915-read-head-register-back-in-init_ring_common-to-enforce-ordering.patch b/queue-3.10/drm-i915-read-head-register-back-in-init_ring_common-to-enforce-ordering.patch
new file mode 100644 (file)
index 0000000..9030829
--- /dev/null
+++ b/queue-3.10/drm-i915-read-head-register-back-in-init_ring_common-to-enforce-ordering.patch
@@ -0,0 +1,45 @@
+From ece4a17d237a79f63fbfaf3f724a12b6d500555c Mon Sep 17 00:00:00 2001
+From: Jiri Kosina <jkosina@suse.cz>
+Date: Thu, 7 Aug 2014 16:29:53 +0200
+Subject: drm/i915: read HEAD register back in init_ring_common() to enforce ordering
+
+From: Jiri Kosina <jkosina@suse.cz>
+
+commit ece4a17d237a79f63fbfaf3f724a12b6d500555c upstream.
+
+Withtout this, ring initialization fails reliabily during resume with
+
+       [drm:init_ring_common] *ERROR* render ring initialization failed ctl 0001f001 head ffffff8804 tail 00000000 start 000e4000
+
+This is not a complete fix, but it is verified to make the ring
+initialization failures during resume much less likely.
+
+We were not able to root-cause this bug (likely HW-specific to Gen4 chips)
+yet. This is therefore used as a ducttape before problem is fully
+understood and proper fix created, so that people don't suffer from
+completely unusable systems in the meantime.
+
+The discussion and debugging is happening at
+
+       https://bugs.freedesktop.org/show_bug.cgi?id=76554
+
+Signed-off-by: Jiri Kosina <jkosina@suse.cz>
+Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ drivers/gpu/drm/i915/intel_ringbuffer.c |    3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
++++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
+@@ -396,6 +396,9 @@ static int init_ring_common(struct intel
+               }
+       }
+ 
++      /* Enforce ordering by reading HEAD register back */
++      I915_READ_HEAD(ring);
++
+       /* Initialize the ring. This must happen _after_ we've cleared the ring
+        * registers with the above sequence (the readback of the HEAD registers
+        * also enforces ordering), otherwise the hw might lose the new ring

diff --git a/queue-3.10/series b/queue-3.10/series
index 750efe287adc00dd8197c17e4c2cc14c23d9074b..f5f97dd4079f2f85ab4d55b34072e43468bb24a8 100644 (file)
--- a/queue-3.10/series
+++ b/queue-3.10/series
@@ -8,3 +8,4 @@ drm-tilcdc-fix-double-kfree.patch
 drm-ttm-fix-possible-division-by-0-in-ttm_dma_pool_shrink_scan.patch
 drm-ttm-choose-a-pool-to-shrink-correctly-in-ttm_dma_pool_shrink_scan.patch
 drm-radeon-load-the-lm63-driver-for-an-lm64-thermal-chip.patch
+drm-i915-read-head-register-back-in-init_ring_common-to-enforce-ordering.patch