]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/i915/ddi: Move platform checks within mtl_ddi_enable/disable_d2d_link()
authorImre Deak <imre.deak@intel.com>
Fri, 14 Feb 2025 14:19:58 +0000 (16:19 +0200)
committerImre Deak <imre.deak@intel.com>
Fri, 14 Feb 2025 19:39:08 +0000 (21:39 +0200)
The prefix of the mtl_ddi_enable_d2d() / mtl_ddi_disable_d2d_link()
names show already what are the relevant platforms, so the corresponding
platform check is a detail that can be hidden in the functions, do so.

While at it rename mtl_ddi_disable_d2d_link() to mtl_ddi_disable_d2d()
for symmetry with mtl_ddi_enable_d2d().

v2: s/mtl_ddi_disable_d2d_link/mtl_ddi_disable_d2d (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250214142001.552916-9-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c

index c72d49c8a6f06b915d8f7c7d2cf0e2691ecf889c..ffb4936e6af998aa5284f1cc8490bc4631587323 100644 (file)
@@ -2556,6 +2556,9 @@ mtl_ddi_enable_d2d(struct intel_encoder *encoder)
        i915_reg_t reg;
        u32 set_bits, wait_bits;
 
+       if (DISPLAY_VER(dev_priv) < 14)
+               return;
+
        if (DISPLAY_VER(dev_priv) >= 20) {
                reg = DDI_BUF_CTL(port);
                set_bits = XE2LPD_DDI_BUF_D2D_LINK_ENABLE;
@@ -3043,13 +3046,16 @@ static void intel_ddi_pre_enable(struct intel_atomic_state *state,
 }
 
 static void
-mtl_ddi_disable_d2d_link(struct intel_encoder *encoder)
+mtl_ddi_disable_d2d(struct intel_encoder *encoder)
 {
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        enum port port = encoder->port;
        i915_reg_t reg;
        u32 clr_bits, wait_bits;
 
+       if (DISPLAY_VER(dev_priv) < 14)
+               return;
+
        if (DISPLAY_VER(dev_priv) >= 20) {
                reg = DDI_BUF_CTL(port);
                clr_bits = XE2LPD_DDI_BUF_D2D_LINK_ENABLE;
@@ -3079,7 +3085,7 @@ static void mtl_disable_ddi_buf(struct intel_encoder *encoder,
        intel_wait_ddi_buf_idle(dev_priv, port);
 
        /* 3.d Disable D2D Link */
-       mtl_ddi_disable_d2d_link(encoder);
+       mtl_ddi_disable_d2d(encoder);
 
        /* 3.e Disable DP_TP_CTL */
        if (intel_crtc_has_dp_encoder(crtc_state)) {
@@ -3428,8 +3434,7 @@ static void intel_ddi_enable_hdmi(struct intel_atomic_state *state,
                hsw_prepare_hdmi_ddi_buffers(encoder, crtc_state);
 
        /* e. Enable D2D Link for C10/C20 Phy */
-       if (DISPLAY_VER(dev_priv) >= 14)
-               mtl_ddi_enable_d2d(encoder);
+       mtl_ddi_enable_d2d(encoder);
 
        encoder->set_signal_levels(encoder, crtc_state);