static bool trans_mtctl(DisasContext *ctx, arg_mtctl *a)
{
unsigned ctl = a->t;
- TCGv_reg reg = load_gpr(ctx, a->r);
+ TCGv_reg reg;
TCGv_reg tmp;
if (ctl == CR_SAR) {
+ reg = load_gpr(ctx, a->r);
tmp = tcg_temp_new();
tcg_gen_andi_reg(tmp, reg, TARGET_REGISTER_BITS - 1);
save_or_nullify(ctx, cpu_sar, tmp);
#ifndef CONFIG_USER_ONLY
nullify_over(ctx);
+ reg = load_gpr(ctx, a->r);
+
switch (ctl) {
case CR_IT:
gen_helper_write_interval_timer(cpu_env, reg);
TCGv_reg mask, tmp, shift, dest;
unsigned msb = 1U << (len - 1);
- if (c) {
- nullify_over(ctx);
- }
-
dest = dest_gpr(ctx, rt);
shift = tcg_temp_new();
tmp = tcg_temp_new();
static bool trans_depw_sar(DisasContext *ctx, arg_depw_sar *a)
{
+ if (a->c) {
+ nullify_over(ctx);
+ }
return do_depw_sar(ctx, a->t, a->c, a->nz, a->clen, load_gpr(ctx, a->r));
}
static bool trans_depwi_sar(DisasContext *ctx, arg_depwi_sar *a)
{
+ if (a->c) {
+ nullify_over(ctx);
+ }
return do_depw_sar(ctx, a->t, a->c, a->nz, a->clen, load_const(ctx, a->i));
}