net: dsa: felix: support phy-mode = "10g-qxgmii"

The "usxgmii" phy-mode that the Felix switch ports support on LS1028A is
not quite USXGMII, it is defined by the USXGMII multiport specification
document as 10G-QXGMII. It uses the same signaling as USXGMII, but it
multiplexes 4 ports over the link, resulting in a maximum speed of 2.5G
per port.

This change is needed in preparation for the lynx-10g SerDes driver on
LS1028A, which will make a more clear distinction between usxgmii
(supported on lane 0) and 10g-qxgmii (supported on lane 1). These
protocols have their configuration in different PCCR registers (PCCRB vs
PCCR9).

Continue parsing and supporting single-port-per-lane USXGMII when found
in the device tree as usual (because it works), but add support for
10G-QXGMII too. Using phy-mode = "10g-qxgmii" will be required when
modifying the device trees to specify a "phys" phandle to the SerDes
lane. The result when the "phys" phandle is present but the phy-mode is
wrong is undefined.

The only PHY driver in known use with this phy-mode, AQR412C, will gain
logic to transition from "usxgmii" to "10g-qxgmii" in a future change.
Prepare the driver by also setting PHY_INTERFACE_MODE_10G_QXGMII in
supported_interfaces when PHY_INTERFACE_MODE_USXGMII is there, to
prevent breakage with existing device trees.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Link: https://patch.msgid.link/20250903130730.2836022-3-vladimir.oltean@nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/dsa/ocelot/felix.c b/drivers/net/dsa/ocelot/felix.c
index 2dd4e56e1cf11014cc4997eae7317883018fe888..20ab558fde24761105c00bd10018681c60315cba 100644 (file)
--- a/drivers/net/dsa/ocelot/felix.c
+++ b/drivers/net/dsa/ocelot/felix.c
@@ -1153,6 +1153,9 @@ static void felix_phylink_get_caps(struct dsa_switch *ds, int port,
 
        __set_bit(ocelot->ports[port]->phy_mode,
                  config->supported_interfaces);
+       if (ocelot->ports[port]->phy_mode == PHY_INTERFACE_MODE_USXGMII)
+               __set_bit(PHY_INTERFACE_MODE_10G_QXGMII,
+                         config->supported_interfaces);
 }
 
 static void felix_phylink_mac_config(struct phylink_config *config,
@@ -1359,6 +1362,7 @@ static const u32 felix_phy_match_table[PHY_INTERFACE_MODE_MAX] = {
        [PHY_INTERFACE_MODE_SGMII] = OCELOT_PORT_MODE_SGMII,
        [PHY_INTERFACE_MODE_QSGMII] = OCELOT_PORT_MODE_QSGMII,
        [PHY_INTERFACE_MODE_USXGMII] = OCELOT_PORT_MODE_USXGMII,
+       [PHY_INTERFACE_MODE_10G_QXGMII] = OCELOT_PORT_MODE_10G_QXGMII,
        [PHY_INTERFACE_MODE_1000BASEX] = OCELOT_PORT_MODE_1000BASEX,
        [PHY_INTERFACE_MODE_2500BASEX] = OCELOT_PORT_MODE_2500BASEX,
 };

diff --git a/drivers/net/dsa/ocelot/felix.h b/drivers/net/dsa/ocelot/felix.h
index 211991f494e352dc523f7a98f557a0ea44e25e5c..a657b190c5d7b39b06dd0aa9a90e509dc33e49e1 100644 (file)
--- a/drivers/net/dsa/ocelot/felix.h
+++ b/drivers/net/dsa/ocelot/felix.h
@@ -12,8 +12,9 @@
 #define OCELOT_PORT_MODE_SGMII         BIT(1)
 #define OCELOT_PORT_MODE_QSGMII                BIT(2)
 #define OCELOT_PORT_MODE_2500BASEX     BIT(3)
-#define OCELOT_PORT_MODE_USXGMII       BIT(4)
+#define OCELOT_PORT_MODE_USXGMII       BIT(4) /* compatibility */
 #define OCELOT_PORT_MODE_1000BASEX     BIT(5)
+#define OCELOT_PORT_MODE_10G_QXGMII    BIT(6)
 
 struct device_node;
 

diff --git a/drivers/net/dsa/ocelot/felix_vsc9959.c b/drivers/net/dsa/ocelot/felix_vsc9959.c
index 7b35d24c38d7658dc8dba24e0aa826200643f7f2..8cf4c898658769d7484455e1f9e8ae6f253ca5fe 100644 (file)
--- a/drivers/net/dsa/ocelot/felix_vsc9959.c
+++ b/drivers/net/dsa/ocelot/felix_vsc9959.c
@@ -34,7 +34,8 @@
                                         OCELOT_PORT_MODE_QSGMII | \
                                         OCELOT_PORT_MODE_1000BASEX | \
                                         OCELOT_PORT_MODE_2500BASEX | \
-                                        OCELOT_PORT_MODE_USXGMII)
+                                        OCELOT_PORT_MODE_USXGMII | \
+                                        OCELOT_PORT_MODE_10G_QXGMII)
 
 static const u32 vsc9959_port_modes[VSC9959_NUM_PORTS] = {
        VSC9959_PORT_MODE_SERDES,