iommu/amd: Initialize iommu_device->max_pasids

Commit 1adf3cc20d69 ("iommu: Add max_pasids field in struct iommu_device")
introduced a variable struct iommu_device.max_pasids to track max
PASIDS supported by each IOMMU.

Let us initialize this field for AMD IOMMU. IOMMU core will use this value
to set max PASIDs per device (see __iommu_probe_device()).

Also remove unused global 'amd_iommu_max_pasid' variable.

Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com>
Link: https://lore.kernel.org/r/20230921092147.5930-15-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>

diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index c6d47cb7a0eeb40114df5c3b4f3ac1fb7bfba75f..5be563d55ad64774a4c590a68885cab3328c8467 100644 (file)
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -886,9 +886,6 @@ extern unsigned amd_iommu_aperture_order;
 /* allocation bitmap for domain ids */
 extern unsigned long *amd_iommu_pd_alloc_bitmap;
 
-/* Smallest max PASID supported by any IOMMU in the system */
-extern u32 amd_iommu_max_pasid;
-
 extern bool amd_iommu_force_isolation;
 
 /* Max levels of glxval supported */

diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 06b319006ce27be098827345d34d507b9e49f9cf..463e68a88b174fb047e5a58d8fe82567c5811fc2 100644 (file)
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -185,8 +185,6 @@ static int amd_iommus_present;
 bool amd_iommu_np_cache __read_mostly;
 bool amd_iommu_iotlb_sup __read_mostly = true;
 
-u32 amd_iommu_max_pasid __read_mostly = ~0;
-
 static bool amd_iommu_pc_present __read_mostly;
 bool amdr_ivrs_remap_support __read_mostly;
 
@@ -2080,16 +2078,13 @@ static int __init iommu_init_pci(struct amd_iommu *iommu)
 
        if (check_feature(FEATURE_GT)) {
                int glxval;
-               u32 max_pasid;
                u64 pasmax;
 
                pasmax = amd_iommu_efr & FEATURE_PASID_MASK;
                pasmax >>= FEATURE_PASID_SHIFT;
-               max_pasid  = (1 << (pasmax + 1)) - 1;
-
-               amd_iommu_max_pasid = min(amd_iommu_max_pasid, max_pasid);
+               iommu->iommu.max_pasids = (1 << (pasmax + 1)) - 1;
 
-               BUG_ON(amd_iommu_max_pasid & ~PASID_MASK);
+               BUG_ON(iommu->iommu.max_pasids & ~PASID_MASK);
 
                glxval   = amd_iommu_efr & FEATURE_GLXVAL_MASK;
                glxval >>= FEATURE_GLXVAL_SHIFT;