--- /dev/null
+From adfab6b39202481bb43286fff94def4953793fdb Mon Sep 17 00:00:00 2001
+From: Jeremy Linton <jeremy.linton@arm.com>
+Date: Wed, 7 May 2025 21:30:25 -0500
+Subject: ACPI: PPTT: Fix processor subtable walk
+
+From: Jeremy Linton <jeremy.linton@arm.com>
+
+commit adfab6b39202481bb43286fff94def4953793fdb upstream.
+
+The original PPTT code had a bug where the processor subtable length
+was not correctly validated when encountering a truncated
+acpi_pptt_processor node.
+
+Commit 7ab4f0e37a0f4 ("ACPI PPTT: Fix coding mistakes in a couple of
+sizeof() calls") attempted to fix this by validating the size is as
+large as the acpi_pptt_processor node structure. This introduced a
+regression where the last processor node in the PPTT table is ignored
+if it doesn't contain any private resources. That results errors like:
+
+ ACPI PPTT: PPTT table found, but unable to locate core XX (XX)
+ ACPI: SPE must be homogeneous
+
+Furthermore, it fails in a common case where the node length isn't
+equal to the acpi_pptt_processor structure size, leaving the original
+bug in a modified form.
+
+Correct the regression by adjusting the loop termination conditions as
+suggested by the bug reporters. An additional check performed after
+the subtable node type is detected, validates the acpi_pptt_processor
+node is fully contained in the PPTT table. Repeating the check in
+acpi_pptt_leaf_node() is largely redundant as the node is already
+known to be fully contained in the table.
+
+The case where a final truncated node's parent property is accepted,
+but the node itself is rejected should not be considered a bug.
+
+Fixes: 7ab4f0e37a0f4 ("ACPI PPTT: Fix coding mistakes in a couple of sizeof() calls")
+Reported-by: Maximilian Heyne <mheyne@amazon.de>
+Closes: https://lore.kernel.org/linux-acpi/20250506-draco-taped-15f475cd@mheyne-amazon/
+Reported-by: Yicong Yang <yangyicong@hisilicon.com>
+Closes: https://lore.kernel.org/linux-acpi/20250507035124.28071-1-yangyicong@huawei.com/
+Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
+Tested-by: Yicong Yang <yangyicong@hisilicon.com>
+Reviewed-by: Sudeep Holla <sudeep.holla@arm.com>
+Tested-by: Maximilian Heyne <mheyne@amazon.de>
+Cc: All applicable <stable@vger.kernel.org> # 7ab4f0e37a0f4: ACPI PPTT: Fix coding mistakes ...
+Link: https://patch.msgid.link/20250508023025.1301030-1-jeremy.linton@arm.com
+Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/acpi/pptt.c | 11 ++++++++---
+ 1 file changed, 8 insertions(+), 3 deletions(-)
+
+--- a/drivers/acpi/pptt.c
++++ b/drivers/acpi/pptt.c
+@@ -231,16 +231,18 @@ static int acpi_pptt_leaf_node(struct ac
+ sizeof(struct acpi_table_pptt));
+ proc_sz = sizeof(struct acpi_pptt_processor);
+
+- while ((unsigned long)entry + proc_sz < table_end) {
++ /* ignore subtable types that are smaller than a processor node */
++ while ((unsigned long)entry + proc_sz <= table_end) {
+ cpu_node = (struct acpi_pptt_processor *)entry;
++
+ if (entry->type == ACPI_PPTT_TYPE_PROCESSOR &&
+ cpu_node->parent == node_entry)
+ return 0;
+ if (entry->length == 0)
+ return 0;
++
+ entry = ACPI_ADD_PTR(struct acpi_subtable_header, entry,
+ entry->length);
+-
+ }
+ return 1;
+ }
+@@ -273,15 +275,18 @@ static struct acpi_pptt_processor *acpi_
+ proc_sz = sizeof(struct acpi_pptt_processor);
+
+ /* find the processor structure associated with this cpuid */
+- while ((unsigned long)entry + proc_sz < table_end) {
++ while ((unsigned long)entry + proc_sz <= table_end) {
+ cpu_node = (struct acpi_pptt_processor *)entry;
+
+ if (entry->length == 0) {
+ pr_warn("Invalid zero length subtable\n");
+ break;
+ }
++ /* entry->length may not equal proc_sz, revalidate the processor structure length */
+ if (entry->type == ACPI_PPTT_TYPE_PROCESSOR &&
+ acpi_cpu_id == cpu_node->acpi_processor_id &&
++ (unsigned long)entry + entry->length <= table_end &&
++ entry->length == proc_sz + cpu_node->number_of_priv_resources * sizeof(u32) &&
+ acpi_pptt_leaf_node(table_hdr, cpu_node)) {
+ return (struct acpi_pptt_processor *)entry;
+ }
--- /dev/null
+From df180e65305f8c1e020d54bfc2132349fd693de1 Mon Sep 17 00:00:00 2001
+From: Nathan Lynch <nathan.lynch@amd.com>
+Date: Thu, 3 Apr 2025 11:24:19 -0500
+Subject: dmaengine: Revert "dmaengine: dmatest: Fix dmatest waiting less when interrupted"
+
+From: Nathan Lynch <nathan.lynch@amd.com>
+
+commit df180e65305f8c1e020d54bfc2132349fd693de1 upstream.
+
+Several issues with this change:
+
+* The analysis is flawed and it's unclear what problem is being
+ fixed. There is no difference between wait_event_freezable_timeout()
+ and wait_event_timeout() with respect to device interrupts. And of
+ course "the interrupt notifying the finish of an operation happens
+ during wait_event_freezable_timeout()" -- that's how it's supposed
+ to work.
+
+* The link at the "Closes:" tag appears to be an unrelated
+ use-after-free in idxd.
+
+* It introduces a regression: dmatest threads are meant to be
+ freezable and this change breaks that.
+
+See discussion here:
+https://lore.kernel.org/dmaengine/878qpa13fe.fsf@AUSNATLYNCH.amd.com/
+
+Fixes: e87ca16e9911 ("dmaengine: dmatest: Fix dmatest waiting less when interrupted")
+Signed-off-by: Nathan Lynch <nathan.lynch@amd.com>
+Link: https://lore.kernel.org/r/20250403-dmaengine-dmatest-revert-waiting-less-v1-1-8227c5a3d7c8@amd.com
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/dma/dmatest.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/dma/dmatest.c
++++ b/drivers/dma/dmatest.c
+@@ -827,9 +827,9 @@ static int dmatest_func(void *data)
+ } else {
+ dma_async_issue_pending(chan);
+
+- wait_event_timeout(thread->done_wait,
+- done->done,
+- msecs_to_jiffies(params->timeout));
++ wait_event_freezable_timeout(thread->done_wait,
++ done->done,
++ msecs_to_jiffies(params->timeout));
+
+ status = dma_async_is_tx_complete(chan, cookie, NULL,
+ NULL);
--- /dev/null
+From d33724ffb743d3d2698bd969e29253ae0cff9739 Mon Sep 17 00:00:00 2001
+From: Wayne Lin <Wayne.Lin@amd.com>
+Date: Tue, 13 May 2025 11:20:24 +0800
+Subject: drm/amd/display: Avoid flooding unnecessary info messages
+
+From: Wayne Lin <Wayne.Lin@amd.com>
+
+commit d33724ffb743d3d2698bd969e29253ae0cff9739 upstream.
+
+It's expected that we'll encounter temporary exceptions
+during aux transactions. Adjust logging from drm_info to
+drm_dbg_dp to prevent flooding with unnecessary log messages.
+
+Fixes: 3637e457eb00 ("drm/amd/display: Fix wrong handling for AUX_DEFER case")
+Cc: Mario Limonciello <mario.limonciello@amd.com>
+Cc: Alex Deucher <alexander.deucher@amd.com>
+Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
+Acked-by: Alex Deucher <alexander.deucher@amd.com>
+Link: https://lore.kernel.org/r/20250513032026.838036-1-Wayne.Lin@amd.com
+Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit 9a9c3e1fe5256da14a0a307dff0478f90c55fc8c)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+@@ -104,7 +104,7 @@ static ssize_t dm_dp_aux_transfer(struct
+ if (payload.write && result >= 0) {
+ if (result) {
+ /*one byte indicating partially written bytes*/
+- drm_info(adev_to_drm(adev), "amdgpu: AUX partially written\n");
++ drm_dbg_dp(adev_to_drm(adev), "amdgpu: AUX partially written\n");
+ result = payload.data[0];
+ } else if (!payload.reply[0])
+ /*I2C_ACK|AUX_ACK*/
+@@ -130,11 +130,11 @@ static ssize_t dm_dp_aux_transfer(struct
+ break;
+ }
+
+- drm_info(adev_to_drm(adev), "amdgpu: DP AUX transfer fail:%d\n", operation_result);
++ drm_dbg_dp(adev_to_drm(adev), "amdgpu: DP AUX transfer fail:%d\n", operation_result);
+ }
+
+ if (payload.reply[0])
+- drm_info(adev_to_drm(adev), "amdgpu: AUX reply command not ACK: 0x%02x.",
++ drm_dbg_dp(adev_to_drm(adev), "amdgpu: AUX reply command not ACK: 0x%02x.",
+ payload.reply[0]);
+
+ return result;
--- /dev/null
+From d433981385c62c72080e26f1c00a961d18b233be Mon Sep 17 00:00:00 2001
+From: Wayne Lin <Wayne.Lin@amd.com>
+Date: Fri, 25 Apr 2025 14:44:02 +0800
+Subject: drm/amd/display: Correct the reply value when AUX write incomplete
+
+From: Wayne Lin <Wayne.Lin@amd.com>
+
+commit d433981385c62c72080e26f1c00a961d18b233be upstream.
+
+[Why]
+Now forcing aux->transfer to return 0 when incomplete AUX write is
+inappropriate. It should return bytes have been transferred.
+
+[How]
+aux->transfer is asked not to change original msg except reply field of
+drm_dp_aux_msg structure. Copy the msg->buffer when it's write request,
+and overwrite the first byte when sink reply 1 byte indicating partially
+written byte number. Then we can return the correct value without
+changing the original msg.
+
+Fixes: 3637e457eb00 ("drm/amd/display: Fix wrong handling for AUX_DEFER case")
+Cc: Mario Limonciello <mario.limonciello@amd.com>
+Cc: Alex Deucher <alexander.deucher@amd.com>
+Reviewed-by: Ray Wu <ray.wu@amd.com>
+Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
+Signed-off-by: Ray Wu <ray.wu@amd.com>
+Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
+Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
+(cherry picked from commit 7ac37f0dcd2e0b729fa7b5513908dc8ab802b540)
+Cc: stable@vger.kernel.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++-
+ drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 10 ++++++++--
+ 2 files changed, 10 insertions(+), 3 deletions(-)
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+@@ -11069,7 +11069,8 @@ int amdgpu_dm_process_dmub_aux_transfer_
+ /* The reply is stored in the top nibble of the command. */
+ payload->reply[0] = (adev->dm.dmub_notify->aux_reply.command >> 4) & 0xF;
+
+- if (!payload->write && p_notify->aux_reply.length)
++ /*write req may receive a byte indicating partially written number as well*/
++ if (p_notify->aux_reply.length)
+ memcpy(payload->data, p_notify->aux_reply.data,
+ p_notify->aux_reply.length);
+
+--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+@@ -59,6 +59,7 @@ static ssize_t dm_dp_aux_transfer(struct
+ enum aux_return_code_type operation_result;
+ struct amdgpu_device *adev;
+ struct ddc_service *ddc;
++ uint8_t copy[16];
+
+ if (WARN_ON(msg->size > 16))
+ return -E2BIG;
+@@ -74,6 +75,11 @@ static ssize_t dm_dp_aux_transfer(struct
+ (msg->request & DP_AUX_I2C_WRITE_STATUS_UPDATE) != 0;
+ payload.defer_delay = 0;
+
++ if (payload.write) {
++ memcpy(copy, msg->buffer, msg->size);
++ payload.data = copy;
++ }
++
+ result = dc_link_aux_transfer_raw(TO_DM_AUX(aux)->ddc_service, &payload,
+ &operation_result);
+
+@@ -97,9 +103,9 @@ static ssize_t dm_dp_aux_transfer(struct
+ */
+ if (payload.write && result >= 0) {
+ if (result) {
+- /*one byte indicating partially written bytes. Force 0 to retry*/
++ /*one byte indicating partially written bytes*/
+ drm_info(adev_to_drm(adev), "amdgpu: AUX partially written\n");
+- result = 0;
++ result = payload.data[0];
+ } else if (!payload.reply[0])
+ /*I2C_ACK|AUX_ACK*/
+ result = msg->size;
--- /dev/null
+From 90436d234230e9a950ccd87831108b688b27a234 Mon Sep 17 00:00:00 2001
+From: Huacai Chen <chenhuacai@loongson.cn>
+Date: Wed, 14 May 2025 22:17:43 +0800
+Subject: LoongArch: Fix MAX_REG_OFFSET calculation
+
+From: Huacai Chen <chenhuacai@loongson.cn>
+
+commit 90436d234230e9a950ccd87831108b688b27a234 upstream.
+
+Fix MAX_REG_OFFSET calculation, make it point to the last register
+in 'struct pt_regs' and not to the marker itself, which could allow
+regs_get_register() to return an invalid offset.
+
+Cc: stable@vger.kernel.org
+Fixes: 803b0fc5c3f2baa6e5 ("LoongArch: Add process management")
+Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/loongarch/include/asm/ptrace.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/loongarch/include/asm/ptrace.h
++++ b/arch/loongarch/include/asm/ptrace.h
+@@ -55,7 +55,7 @@ static inline void instruction_pointer_s
+
+ /* Query offset/name of register from its name/offset */
+ extern int regs_query_register_offset(const char *name);
+-#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last))
++#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last) - sizeof(unsigned long))
+
+ /**
+ * regs_get_register() - get register value from its offset
--- /dev/null
+From 2468b0e3d5659dfde77f081f266e1111a981efb8 Mon Sep 17 00:00:00 2001
+From: Tianyang Zhang <zhangtianyang@loongson.cn>
+Date: Wed, 14 May 2025 22:17:43 +0800
+Subject: LoongArch: Prevent cond_resched() occurring within kernel-fpu
+
+From: Tianyang Zhang <zhangtianyang@loongson.cn>
+
+commit 2468b0e3d5659dfde77f081f266e1111a981efb8 upstream.
+
+When CONFIG_PREEMPT_COUNT is not configured (i.e. CONFIG_PREEMPT_NONE/
+CONFIG_PREEMPT_VOLUNTARY), preempt_disable() / preempt_enable() merely
+acts as a barrier(). However, in these cases cond_resched() can still
+trigger a context switch and modify the CSR.EUEN, resulting in do_fpu()
+exception being activated within the kernel-fpu critical sections, as
+demonstrated in the following path:
+
+dcn32_calculate_wm_and_dlg()
+ DC_FP_START()
+ dcn32_calculate_wm_and_dlg_fpu()
+ dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
+ dcn32_internal_validate_bw()
+ dcn32_enable_phantom_stream()
+ dc_create_stream_for_sink()
+ kzalloc(GFP_KERNEL)
+ __kmem_cache_alloc_node()
+ __cond_resched()
+ DC_FP_END()
+
+This patch is similar to commit d02198550423a0b (x86/fpu: Improve crypto
+performance by making kernel-mode FPU reliably usable in softirqs). It
+uses local_bh_disable() instead of preempt_disable() for non-RT kernels
+so it can avoid the cond_resched() issue, and also extend the kernel-fpu
+application scenarios to the softirq context.
+
+Cc: stable@vger.kernel.org
+Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn>
+Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/loongarch/kernel/kfpu.c | 22 ++++++++++++++++++++--
+ 1 file changed, 20 insertions(+), 2 deletions(-)
+
+--- a/arch/loongarch/kernel/kfpu.c
++++ b/arch/loongarch/kernel/kfpu.c
+@@ -18,11 +18,28 @@ static unsigned int euen_mask = CSR_EUEN
+ static DEFINE_PER_CPU(bool, in_kernel_fpu);
+ static DEFINE_PER_CPU(unsigned int, euen_current);
+
++static inline void fpregs_lock(void)
++{
++ if (IS_ENABLED(CONFIG_PREEMPT_RT))
++ preempt_disable();
++ else
++ local_bh_disable();
++}
++
++static inline void fpregs_unlock(void)
++{
++ if (IS_ENABLED(CONFIG_PREEMPT_RT))
++ preempt_enable();
++ else
++ local_bh_enable();
++}
++
+ void kernel_fpu_begin(void)
+ {
+ unsigned int *euen_curr;
+
+- preempt_disable();
++ if (!irqs_disabled())
++ fpregs_lock();
+
+ WARN_ON(this_cpu_read(in_kernel_fpu));
+
+@@ -73,7 +90,8 @@ void kernel_fpu_end(void)
+
+ this_cpu_write(in_kernel_fpu, false);
+
+- preempt_enable();
++ if (!irqs_disabled())
++ fpregs_unlock();
+ }
+ EXPORT_SYMBOL_GPL(kernel_fpu_end);
+
--- /dev/null
+From ceb9155d058a11242aa0572875c44e9713b1a2be Mon Sep 17 00:00:00 2001
+From: Huacai Chen <chenhuacai@loongson.cn>
+Date: Wed, 14 May 2025 22:17:52 +0800
+Subject: LoongArch: Save and restore CSR.CNTC for hibernation
+
+From: Huacai Chen <chenhuacai@loongson.cn>
+
+commit ceb9155d058a11242aa0572875c44e9713b1a2be upstream.
+
+Save and restore CSR.CNTC for hibernation which is similar to suspend.
+
+For host this is unnecessary because sched clock is ensured continuous,
+but for kvm guest sched clock isn't enough because rdtime.d should also
+be continuous.
+
+Host::rdtime.d = Host::CSR.CNTC + counter
+Guest::rdtime.d = Host::CSR.CNTC + Host::CSR.GCNTC + Guest::CSR.CNTC + counter
+
+so,
+
+Guest::rdtime.d = Host::rdtime.d + Host::CSR.GCNTC + Guest::CSR.CNTC
+
+To ensure Guest::rdtime.d continuous, Host::rdtime.d should be at first
+continuous, while Host::CSR.GCNTC / Guest::CSR.CNTC is maintained by KVM.
+
+Cc: stable@vger.kernel.org
+Signed-off-by: Xianglai Li <lixianglai@loongson.cn>
+Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/loongarch/kernel/time.c | 2 +-
+ arch/loongarch/power/hibernate.c | 3 +++
+ 2 files changed, 4 insertions(+), 1 deletion(-)
+
+--- a/arch/loongarch/kernel/time.c
++++ b/arch/loongarch/kernel/time.c
+@@ -110,7 +110,7 @@ static unsigned long __init get_loops_pe
+ return lpj;
+ }
+
+-static long init_offset __nosavedata;
++static long init_offset;
+
+ void save_counter(void)
+ {
+--- a/arch/loongarch/power/hibernate.c
++++ b/arch/loongarch/power/hibernate.c
+@@ -2,6 +2,7 @@
+ #include <asm/fpu.h>
+ #include <asm/loongson.h>
+ #include <asm/sections.h>
++#include <asm/time.h>
+ #include <asm/tlbflush.h>
+ #include <linux/suspend.h>
+
+@@ -14,6 +15,7 @@ struct pt_regs saved_regs;
+
+ void save_processor_state(void)
+ {
++ save_counter();
+ saved_crmd = csr_read32(LOONGARCH_CSR_CRMD);
+ saved_prmd = csr_read32(LOONGARCH_CSR_PRMD);
+ saved_euen = csr_read32(LOONGARCH_CSR_EUEN);
+@@ -26,6 +28,7 @@ void save_processor_state(void)
+
+ void restore_processor_state(void)
+ {
++ sync_counter();
+ csr_write32(saved_crmd, LOONGARCH_CSR_CRMD);
+ csr_write32(saved_prmd, LOONGARCH_CSR_PRMD);
+ csr_write32(saved_euen, LOONGARCH_CSR_EUEN);
--- /dev/null
+From 12614f794274f63fbdfe76771b2b332077d63848 Mon Sep 17 00:00:00 2001
+From: Tiezhu Yang <yangtiezhu@loongson.cn>
+Date: Wed, 14 May 2025 22:18:10 +0800
+Subject: LoongArch: uprobes: Remove redundant code about resume_era
+
+From: Tiezhu Yang <yangtiezhu@loongson.cn>
+
+commit 12614f794274f63fbdfe76771b2b332077d63848 upstream.
+
+arch_uprobe_skip_sstep() returns true if instruction was emulated, that
+is to say, there is no need to single step for the emulated instructions.
+regs->csr_era will point to the destination address directly after the
+exception, so the resume_era related code is redundant, just remove them.
+
+Cc: stable@vger.kernel.org
+Fixes: 19bc6cb64092 ("LoongArch: Add uprobes support")
+Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
+Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/loongarch/include/asm/uprobes.h | 1 -
+ arch/loongarch/kernel/uprobes.c | 7 +------
+ 2 files changed, 1 insertion(+), 7 deletions(-)
+
+--- a/arch/loongarch/include/asm/uprobes.h
++++ b/arch/loongarch/include/asm/uprobes.h
+@@ -15,7 +15,6 @@ typedef u32 uprobe_opcode_t;
+ #define UPROBE_XOLBP_INSN larch_insn_gen_break(BRK_UPROBE_XOLBP)
+
+ struct arch_uprobe {
+- unsigned long resume_era;
+ u32 insn[2];
+ u32 ixol[2];
+ bool simulate;
+--- a/arch/loongarch/kernel/uprobes.c
++++ b/arch/loongarch/kernel/uprobes.c
+@@ -52,11 +52,7 @@ int arch_uprobe_post_xol(struct arch_upr
+
+ WARN_ON_ONCE(current->thread.trap_nr != UPROBE_TRAP_NR);
+ current->thread.trap_nr = utask->autask.saved_trap_nr;
+-
+- if (auprobe->simulate)
+- instruction_pointer_set(regs, auprobe->resume_era);
+- else
+- instruction_pointer_set(regs, utask->vaddr + LOONGARCH_INSN_SIZE);
++ instruction_pointer_set(regs, utask->vaddr + LOONGARCH_INSN_SIZE);
+
+ return 0;
+ }
+@@ -86,7 +82,6 @@ bool arch_uprobe_skip_sstep(struct arch_
+
+ insn.word = auprobe->insn[0];
+ arch_simulate_insn(insn, regs);
+- auprobe->resume_era = regs->csr_era;
+
+ return true;
+ }
--- /dev/null
+From 0b326b2371f94e798137cc1a3c5c2eef2bc69061 Mon Sep 17 00:00:00 2001
+From: Tiezhu Yang <yangtiezhu@loongson.cn>
+Date: Wed, 14 May 2025 22:18:10 +0800
+Subject: LoongArch: uprobes: Remove user_{en,dis}able_single_step()
+
+From: Tiezhu Yang <yangtiezhu@loongson.cn>
+
+commit 0b326b2371f94e798137cc1a3c5c2eef2bc69061 upstream.
+
+When executing the "perf probe" and "perf stat" test cases about some
+cryptographic algorithm, the output shows that "Trace/breakpoint trap".
+This is because it uses the software singlestep breakpoint for uprobes
+on LoongArch, and no need to use the hardware singlestep. So just remove
+the related function call to user_{en,dis}able_single_step() for uprobes
+on LoongArch.
+
+How to reproduce:
+
+Please make sure CONFIG_UPROBE_EVENTS is set and openssl supports sm2
+algorithm, then execute the following command.
+
+cd tools/perf && make
+./perf probe -x /usr/lib64/libcrypto.so BN_mod_mul_montgomery
+./perf stat -e probe_libcrypto:BN_mod_mul_montgomery openssl speed sm2
+
+Cc: stable@vger.kernel.org
+Fixes: 19bc6cb64092 ("LoongArch: Add uprobes support")
+Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
+Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/loongarch/kernel/uprobes.c | 4 ----
+ 1 file changed, 4 deletions(-)
+
+--- a/arch/loongarch/kernel/uprobes.c
++++ b/arch/loongarch/kernel/uprobes.c
+@@ -42,7 +42,6 @@ int arch_uprobe_pre_xol(struct arch_upro
+ utask->autask.saved_trap_nr = current->thread.trap_nr;
+ current->thread.trap_nr = UPROBE_TRAP_NR;
+ instruction_pointer_set(regs, utask->xol_vaddr);
+- user_enable_single_step(current);
+
+ return 0;
+ }
+@@ -59,8 +58,6 @@ int arch_uprobe_post_xol(struct arch_upr
+ else
+ instruction_pointer_set(regs, utask->vaddr + LOONGARCH_INSN_SIZE);
+
+- user_disable_single_step(current);
+-
+ return 0;
+ }
+
+@@ -70,7 +67,6 @@ void arch_uprobe_abort_xol(struct arch_u
+
+ current->thread.trap_nr = utask->autask.saved_trap_nr;
+ instruction_pointer_set(regs, utask->vaddr);
+- user_disable_single_step(current);
+ }
+
+ bool arch_uprobe_xol_was_trapped(struct task_struct *t)
Signed-off-by: Trond Myklebust <trond.myklebust@hammerspace.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
- fs/nfs/pnfs.c | 9 +++++++++
+ fs/nfs/pnfs.c | 9 +++++++++
1 file changed, 9 insertions(+)
-diff --git a/fs/nfs/pnfs.c b/fs/nfs/pnfs.c
-index fe83c681e3fe0..73aa5a63afe3f 100644
--- a/fs/nfs/pnfs.c
+++ b/fs/nfs/pnfs.c
-@@ -732,6 +732,14 @@ pnfs_mark_matching_lsegs_invalid(struct pnfs_layout_hdr *lo,
+@@ -732,6 +732,14 @@ pnfs_mark_matching_lsegs_invalid(struct
return remaining;
}
static void
pnfs_free_returned_lsegs(struct pnfs_layout_hdr *lo,
struct list_head *free_me,
-@@ -1180,6 +1188,7 @@ void pnfs_layoutreturn_free_lsegs(struct pnfs_layout_hdr *lo,
+@@ -1180,6 +1188,7 @@ void pnfs_layoutreturn_free_lsegs(struct
pnfs_mark_matching_lsegs_invalid(lo, &freeme, range, seq);
pnfs_free_returned_lsegs(lo, &freeme, range, seq);
pnfs_set_layout_stateid(lo, stateid, NULL, true);
} else
pnfs_mark_layout_stateid_invalid(lo, &freeme);
out_unlock:
---
-2.39.5
-
tsnep-inline-small-fragments-within-tx-descriptor.patch
tsnep-fix-timestamping-with-a-stacked-dsa-driver.patch
nfsv4-pnfs-reset-the-layout-state-after-a-layoutretu.patch
+dmaengine-revert-dmaengine-dmatest-fix-dmatest-waiting-less-when-interrupted.patch
+udf-make-sure-i_lenextents-is-uptodate-on-inode-eviction.patch
+loongarch-prevent-cond_resched-occurring-within-kernel-fpu.patch
+loongarch-save-and-restore-csr.cntc-for-hibernation.patch
+loongarch-fix-max_reg_offset-calculation.patch
+loongarch-uprobes-remove-user_-en-dis-able_single_step.patch
+loongarch-uprobes-remove-redundant-code-about-resume_era.patch
+drm-amd-display-correct-the-reply-value-when-aux-write-incomplete.patch
+drm-amd-display-avoid-flooding-unnecessary-info-messages.patch
+acpi-pptt-fix-processor-subtable-walk.patch
--- /dev/null
+From 55dd5b4db3bf04cf077a8d1712f6295d4517c337 Mon Sep 17 00:00:00 2001
+From: Jan Kara <jack@suse.cz>
+Date: Wed, 7 May 2025 11:49:41 +0200
+Subject: udf: Make sure i_lenExtents is uptodate on inode eviction
+
+From: Jan Kara <jack@suse.cz>
+
+commit 55dd5b4db3bf04cf077a8d1712f6295d4517c337 upstream.
+
+UDF maintains total length of all extents in i_lenExtents. Generally we
+keep extent lengths (and thus i_lenExtents) block aligned because it
+makes the file appending logic simpler. However the standard mandates
+that the inode size must match the length of all extents and thus we
+trim the last extent when closing the file. To catch possible bugs we
+also verify that i_lenExtents matches i_size when evicting inode from
+memory. Commit b405c1e58b73 ("udf: refactor udf_next_aext() to handle
+error") however broke the code updating i_lenExtents and thus
+udf_evict_inode() ended up spewing lots of errors about incorrectly
+sized extents although the extents were actually sized properly. Fix the
+updating of i_lenExtents to silence the errors.
+
+Fixes: b405c1e58b73 ("udf: refactor udf_next_aext() to handle error")
+CC: stable@vger.kernel.org
+Signed-off-by: Jan Kara <jack@suse.cz>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ fs/udf/truncate.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/fs/udf/truncate.c
++++ b/fs/udf/truncate.c
+@@ -115,7 +115,7 @@ void udf_truncate_tail_extent(struct ino
+ }
+ /* This inode entry is in-memory only and thus we don't have to mark
+ * the inode dirty */
+- if (ret == 0)
++ if (ret >= 0)
+ iinfo->i_lenExtents = inode->i_size;
+ brelse(epos.bh);
+ }
projects / thirdparty / kernel / stable-queue.git / commitdiff
