aarch64.c (aarch64_fixed_condition_code_regs): New function.

2013-01-04  Andrew Pinski  <apinski@cavium.com>

	* config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs):
	New function.
	(TARGET_FIXED_CONDITION_CODE_REGS): Define.

2013-01-04  Andrew Pinski  <apinski@cavium.com>

	* gcc.target/aarch64/cmp-1.c: New testcase.

From-SVN: r194920

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index be15aa3b938b4d2153d4fbcb48a7c3f13302cd26..c972d9cb13b46952f6d17b9d08a5fd738d98d6fa 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2013-01-04  Andrew Pinski  <apinski@cavium.com>
+
+       * config/aarch64/aarch64.c (aarch64_fixed_condition_code_regs):
+       New function.
+       (TARGET_FIXED_CONDITION_CODE_REGS): Define.
+
 2013-01-04  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.c (ix86_legitimize_address): Call convert_to_mode

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 03b13613c6ef0a2488f6ba6a7848a7dca0100332..6bba8cc8a6dd03a950b5f2216e12e8f7010a3c79 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -3041,6 +3041,16 @@ aarch64_const_double_zero_rtx_p (rtx x)
   return REAL_VALUES_EQUAL (r, dconst0);
 }
 
+/* Return the fixed registers used for condition codes.  */
+
+static bool
+aarch64_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2)
+{
+  *p1 = CC_REGNUM;
+  *p2 = INVALID_REGNUM;
+  return true;
+}
+
 enum machine_mode
 aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y)
 {
@@ -7551,6 +7561,9 @@ aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode,
 #define TARGET_VECTORIZE_VEC_PERM_CONST_OK \
   aarch64_vectorize_vec_perm_const_ok
 
+
+#define TARGET_FIXED_CONDITION_CODE_REGS aarch64_fixed_condition_code_regs
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-aarch64.h"

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9835a26ab1516750c2495aace386263e66b9cb3f..388d1cef143a3af5a301bbfa119e829fdd7f300f 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2013-01-04  Andrew Pinski  <apinski@cavium.com>
+
+       * gcc.target/aarch64/cmp-1.c: New testcase.
+
 2013-01-04  Paul Thomas  <pault@gcc.gnu.org>
 
        PR fortran/55172

diff --git a/gcc/testsuite/gcc.target/aarch64/cmp-1.c b/gcc/testsuite/gcc.target/aarch64/cmp-1.c
new file mode 100644 (file)
index 0000000..4c082b4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/cmp-1.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+int f(int a, int b)
+{
+  if(a<b)
+    return 1;
+  if(a>b)
+    return -1;
+  return 0;
+}
+
+/* We should optimize away the second cmp. */
+/* { dg-final { scan-assembler-times "cmp\tw" 1 } } */
+