5.4-stable patches

added patches:
	rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch

diff --git a/queue-5.4/gpio-amd8111-and-tqmx86-require-has_ioport_map.patch b/queue-5.4/gpio-amd8111-and-tqmx86-require-has_ioport_map.patch
index cac4dc797a2eb23663452fa27eb5683efa3b21f1..54646ea7a2e10c672cd8e12080faabe1682b2752 100644 (file)
--- a/queue-5.4/gpio-amd8111-and-tqmx86-require-has_ioport_map.patch
+++ b/queue-5.4/gpio-amd8111-and-tqmx86-require-has_ioport_map.patch
@@ -17,11 +17,9 @@ Signed-off-by: Johannes Berg <johannes.berg@intel.com>
 Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
 Signed-off-by: Sasha Levin <sashal@kernel.org>
 ---
- drivers/gpio/Kconfig | 2 ++
+ drivers/gpio/Kconfig |    2 ++
  1 file changed, 2 insertions(+)
 
-diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
-index f9263426af03..ae414045a750 100644
 --- a/drivers/gpio/Kconfig
 +++ b/drivers/gpio/Kconfig
 @@ -1232,6 +1232,7 @@ config GPIO_TPS68470
@@ -40,6 +38,3 @@ index f9263426af03..ae414045a750 100644
        help
          The AMD 8111 south bridge contains 32 GPIO pins which can be used.
  
--- 
-2.30.2
-

diff --git a/queue-5.4/rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch b/queue-5.4/rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch
new file mode 100644 (file)
index 0000000..99ec274
--- /dev/null
+++ b/queue-5.4/rdma-mlx5-block-fdb-rules-when-not-in-switchdev-mode.patch
@@ -0,0 +1,53 @@
+From foo@baz Mon Jul  5 09:13:30 AM CEST 2021
+From: Mark Bloch <mbloch@nvidia.com>
+Date: Mon, 7 Jun 2021 11:03:12 +0300
+Subject: RDMA/mlx5: Block FDB rules when not in switchdev mode
+
+From: Mark Bloch <mbloch@nvidia.com>
+
+commit edc0b0bccc9c80d9a44d3002dcca94984b25e7cf upstream.
+
+Allow creating FDB steering rules only when in switchdev mode.
+
+The only software model where a userspace application can manipulate
+FDB entries is when it manages the eswitch. This is only possible in
+switchdev mode where we expose a single RDMA device with representors
+for all the vports that are connected to the eswitch.
+
+Fixes: 52438be44112 ("RDMA/mlx5: Allow inserting a steering rule to the FDB")
+Link: https://lore.kernel.org/r/e928ae7c58d07f104716a2a8d730963d1bd01204.1623052923.git.leonro@nvidia.com
+Reviewed-by: Maor Gottlieb <maorg@nvidia.com>
+Signed-off-by: Mark Bloch <mbloch@nvidia.com>
+Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
+Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
+[sudip: manually backport to old file]
+Signed-off-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/infiniband/hw/mlx5/flow.c |    8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/infiniband/hw/mlx5/flow.c
++++ b/drivers/infiniband/hw/mlx5/flow.c
+@@ -13,6 +13,7 @@
+ #include <rdma/ib_umem.h>
+ #include <linux/mlx5/driver.h>
+ #include <linux/mlx5/fs.h>
++#include <linux/mlx5/eswitch.h>
+ #include "mlx5_ib.h"
+ 
+ #define UVERBS_MODULE_NAME mlx5_ib
+@@ -316,6 +317,13 @@ static int UVERBS_HANDLER(MLX5_IB_METHOD
+       if (err)
+               goto end;
+ 
++      if (obj->ns_type == MLX5_FLOW_NAMESPACE_FDB &&
++          mlx5_eswitch_mode(dev->mdev->priv.eswitch) !=
++                            MLX5_ESWITCH_OFFLOADS) {
++              err = -EINVAL;
++              goto end;
++      }
++
+       uobj->object = obj;
+       obj->mdev = dev->mdev;
+       atomic_set(&obj->usecnt, 0);