rseq/selftests: Fix riscv rseq_offset_deref_addv inline asm

When working on OpenRISC support for restartable sequences I noticed
and fixed these two issues with the riscv support bits.

 1 The 'inc' argument to RSEQ_ASM_OP_R_DEREF_ADDV was being implicitly
   passed to the macro.  Fix this by adding 'inc' to the list of macro
   arguments.
 2 The inline asm input constraints for 'inc' and 'off' use "er",  The
   riscv gcc port does not have an "e" constraint, this looks to be
   copied from the x86 port.  Fix this by just using an "r" constraint.

I have compile tested this only for riscv.  However, the same fixes I
use in the OpenRISC rseq selftests and everything passes with no issues.

Fixes: 171586a6ab66 ("selftests/rseq: riscv: Template memory ordering and percpu access mode")
Signed-off-by: Stafford Horne <shorne@gmail.com>
Tested-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Acked-by: Shuah Khan <skhan@linuxfoundation.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20250114170721.3613280-1-shorne@gmail.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

diff --git a/tools/testing/selftests/rseq/rseq-riscv-bits.h b/tools/testing/selftests/rseq/rseq-riscv-bits.h
index de31a0143139b7b5a3e93034e87037adc295df1c..f02f411d550d18541fe4c5e551214ff3a6c0a921 100644 (file)
--- a/tools/testing/selftests/rseq/rseq-riscv-bits.h
+++ b/tools/testing/selftests/rseq/rseq-riscv-bits.h
@@ -243,7 +243,7 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_offset_deref_addv)(intptr_t *ptr, off_t off, i
 #ifdef RSEQ_COMPARE_TWICE
                                  RSEQ_ASM_CMP_CPU_ID(cpu_id, current_cpu_id, "%l[error1]")
 #endif
-                                 RSEQ_ASM_OP_R_DEREF_ADDV(ptr, off, 3)
+                                 RSEQ_ASM_OP_R_DEREF_ADDV(ptr, off, inc, 3)
                                  RSEQ_INJECT_ASM(4)
                                  RSEQ_ASM_DEFINE_ABORT(4, abort)
                                  : /* gcc asm goto does not allow outputs */
@@ -251,8 +251,8 @@ int RSEQ_TEMPLATE_IDENTIFIER(rseq_offset_deref_addv)(intptr_t *ptr, off_t off, i
                                    [current_cpu_id]            "m" (rseq_get_abi()->RSEQ_TEMPLATE_CPU_ID_FIELD),
                                    [rseq_cs]                   "m" (rseq_get_abi()->rseq_cs.arch.ptr),
                                    [ptr]                       "r" (ptr),
-                                   [off]                       "er" (off),
-                                   [inc]                       "er" (inc)
+                                   [off]                       "r" (off),
+                                   [inc]                       "r" (inc)
                                    RSEQ_INJECT_INPUT
                                  : "memory", RSEQ_ASM_TMP_REG_1
                                    RSEQ_INJECT_CLOBBER

diff --git a/tools/testing/selftests/rseq/rseq-riscv.h b/tools/testing/selftests/rseq/rseq-riscv.h
index 37e598d0a365e2701249ceff2b742ed3408161e1..67d544aaa9a3b0557f8be9bb5ad6ec861e7a3e6c 100644 (file)
--- a/tools/testing/selftests/rseq/rseq-riscv.h
+++ b/tools/testing/selftests/rseq/rseq-riscv.h
@@ -158,7 +158,7 @@ do {                                                                        \
        "bnez   " RSEQ_ASM_TMP_REG_1 ", 222b\n"                         \
        "333:\n"
 
-#define RSEQ_ASM_OP_R_DEREF_ADDV(ptr, off, post_commit_label)          \
+#define RSEQ_ASM_OP_R_DEREF_ADDV(ptr, off, inc, post_commit_label)     \
        "mv     " RSEQ_ASM_TMP_REG_1 ", %[" __rseq_str(ptr) "]\n"       \
        RSEQ_ASM_OP_R_ADD(off)                                          \
        REG_L     RSEQ_ASM_TMP_REG_1 ", 0(" RSEQ_ASM_TMP_REG_1 ")\n"    \