]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
dwc3: versal: Move GFLADJ adjustment logic to dwc3-generic-host
authorAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Fri, 24 Sep 2021 08:31:20 +0000 (02:31 -0600)
committerMichal Simek <michal.simek@xilinx.com>
Fri, 24 Sep 2021 09:04:14 +0000 (11:04 +0200)
USB host driver moved to use "dwc3-generic-host" from old "xhci-dwc3" as
per commit b575e909168c ("usb: dwc3-generic: add a new host driver that
uses the dwc3 core").

Move frame length adjustment functionality of GFLADJ which was added with
commit 6e51fd18863d ("dwc3: versal: Correct the logic for GFLADJ
adjustment") to new "dwc3-generic-host" driver.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
drivers/usb/dwc3/core.h
drivers/usb/dwc3/dwc3-generic.c
drivers/usb/host/xhci-dwc3.c
include/linux/usb/dwc3.h

index 44533fd7fed44491304f248697bd471ff6fe31bf..b2c4328a0930d48733fc8326ce3063a12357c4ab 100644 (file)
 #define DWC3_GEVNTCOUNT(n)     (0xc40c + (n * 0x10))
 
 #define DWC3_GHWPARAMS8                0xc600
+#define DWC3_GFLADJ            0xC630
 
 /* Device Registers */
 #define DWC3_DCFG              0xc700
 #define DWC3_DEPCMD_TYPE_BULK          2
 #define DWC3_DEPCMD_TYPE_INTR          3
 
+/* Global Frame Length Adjustment Register */
+#define GFLADJ_30MHZ_REG_SEL           BIT(7)
+#define GFLADJ_30MHZ_MASK              GENMASK(5, 0)
+#define GFLADJ_REFCLK_FLADJ            GENMASK(21, 8)
+
 /* Structures */
 
 struct dwc3_trb;
index 222358d3959363a756de53b0c7fc51c425073c0e..c80eebe9b3bf6a2756920f51df4c83fd74a37e06 100644 (file)
@@ -49,6 +49,40 @@ struct dwc3_generic_host_priv {
        struct dwc3_generic_priv gen_priv;
 };
 
+static void dwc3_frame_length_adjustment(struct udevice *dev, struct dwc3 *dwc)
+{
+       u32 fladj, gfladj, reg;
+       bool refclk_fladj;
+
+       fladj = dev_read_u32_default(dev, "snps,quirk-frame-length-adjustment",
+                                    0);
+       if (!fladj)
+               return;
+
+       /* Save the initial GFLADJ register value */
+       reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
+       gfladj = reg;
+
+       refclk_fladj = dev_read_bool(dev, "snps,refclk_fladj");
+
+       if (refclk_fladj) {
+               if ((reg & GFLADJ_REFCLK_FLADJ) != (fladj &
+                                       GFLADJ_REFCLK_FLADJ)) {
+                       reg &= ~GFLADJ_REFCLK_FLADJ;
+                       reg |= (fladj & GFLADJ_REFCLK_FLADJ);
+               }
+       }
+
+       if ((reg & GFLADJ_30MHZ_MASK) != fladj) {
+               reg &= ~GFLADJ_30MHZ_MASK;
+               reg |= GFLADJ_30MHZ_REG_SEL | fladj;
+       }
+
+       /* Update GFLADJ if there is any change from initial value */
+       if (reg != gfladj)
+               dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
+}
+
 static int dwc3_generic_probe(struct udevice *dev,
                              struct dwc3_generic_priv *priv)
 {
@@ -90,6 +124,10 @@ static int dwc3_generic_probe(struct udevice *dev,
                return rc;
        }
 
+       /* Adjust frame length */
+       if (device_is_compatible(dev->parent, "xlnx,versal-dwc3"))
+               dwc3_frame_length_adjustment(dev, dwc3);
+
        return 0;
 }
 
index 301d113792dbdc86781d5cccd3afd8d15e4fae7c..045de2ffdec0198d1c8cb2703e64d8162997a187 100644 (file)
@@ -110,42 +110,6 @@ void dwc3_set_fladj(struct dwc3 *dwc3_reg, u32 val)
                        GFLADJ_30MHZ(val));
 }
 
-#if defined(CONFIG_ARCH_VERSAL)
-static void dwc3_frame_length_adjustment(struct udevice *dev, struct dwc3 *dwc)
-{
-       u32 fladj, gfladj, reg;
-       bool refclk_fladj;
-
-       fladj = dev_read_u32_default(dev, "snps,quirk-frame-length-adjustment",
-                                    0);
-       if (!fladj)
-               return;
-
-       /* Save the initial GFLADJ register value */
-       reg = readl(&dwc->g_fladj);
-       gfladj = reg;
-
-       refclk_fladj = dev_read_bool(dev, "snps,refclk_fladj");
-
-       if (refclk_fladj) {
-               if ((reg & GFLADJ_REFCLK_FLADJ) != (fladj &
-                                       GFLADJ_REFCLK_FLADJ)) {
-                       reg &= ~GFLADJ_REFCLK_FLADJ;
-                       reg |= (fladj & GFLADJ_REFCLK_FLADJ);
-               }
-       }
-
-       if ((reg & GFLADJ_30MHZ_MASK) != fladj) {
-               reg &= ~GFLADJ_30MHZ_MASK;
-               reg |= GFLADJ_30MHZ_REG_SEL | fladj;
-       }
-
-       /* Update GFLADJ if there is any change from initial value */
-       if (reg != gfladj)
-               writel(reg, &dwc->g_fladj);
-}
-#endif
-
 #if CONFIG_IS_ENABLED(DM_USB)
 static int xhci_dwc3_probe(struct udevice *dev)
 {
@@ -170,10 +134,6 @@ static int xhci_dwc3_probe(struct udevice *dev)
 
        dwc3_core_init(dwc3_reg);
 
-#if defined(CONFIG_ARCH_VERSAL)
-       /* Adjust Frame Length */
-       dwc3_frame_length_adjustment(dev, dwc3_reg);
-#endif
        /* Set dwc3 usb2 phy config */
        reg = readl(&dwc3_reg->g_usb2phycfg[0]);
 
index 55e11fe463d18dc815b5ae44e8ffa915fdd73005..9ceee0a1c9f6eb61dd349a725a89276959c73747 100644 (file)
@@ -211,10 +211,8 @@ struct dwc3 {                                      /* offset: 0xC100 */
 
 /* Global Frame Length Adjustment Register */
 #define GFLADJ_30MHZ_REG_SEL                   (1 << 7)
-#define GFLADJ_30MHZ(n)                                ((n) & GFLADJ_30MHZ_MASK)
-#define GFLADJ_30MHZ_MASK                      0x3f
+#define GFLADJ_30MHZ(n)                                ((n) & 0x3f)
 #define GFLADJ_30MHZ_DEFAULT                   0x20
-#define GFLADJ_REFCLK_FLADJ                    (0x3fff << 8)
 
 #ifdef CONFIG_USB_XHCI_DWC3
 void dwc3_set_mode(struct dwc3 *dwc3_reg, u32 mode);