Remove MaskExists property from config/*/*.opt files

2012-03-27  H.J. Lu  <hongjiu.lu@intel.com>

	* config/arm/arm.opt (mapcs): Remove MaskExists.
	* config/cris/linux.opt (mno-gotplt): Likewise.
	* config/i386/i386.opt (mhard-float): Likewise.
	(msse4): Likewise.
	(mno-sse4): Likewise.
	* config/m68k/m68k.opt (mhard-float): Likewise.
	* config/mep/mep.op (mcop32): Likewise.
	* config/pa/pa-hpux.opt (msio): Likewise.
	* config/pa/pa64-hpux.opt (mgnu-ld): Likewise.
	* config/picochip/picochip.opt (mlittle): Likewise.
	* config/sh/sh.opt (mrenesas): Likewise.
	* config/sparc/long-double-switch.opt (mlong-double-128): Likewise.
	* config/sparc/sparc.opt (mhard-float): Likewise.
	* config/v850/v850.opt (mv850es): Likewise.
	* config/vax/vax.opt (mg-float): Likewise.

From-SVN: r185893

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 729f51f884659d45a9671407967ba6e695fd7aef..2376541cb7e60e136ca225d0e2cefc401f860ee7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,21 @@
+2012-03-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/arm/arm.opt (mapcs): Remove MaskExists.
+       * config/cris/linux.opt (mno-gotplt): Likewise.
+       * config/i386/i386.opt (mhard-float): Likewise.
+       (msse4): Likewise.
+       (mno-sse4): Likewise.
+       * config/m68k/m68k.opt (mhard-float): Likewise.
+       * config/mep/mep.op (mcop32): Likewise.
+       * config/pa/pa-hpux.opt (msio): Likewise.
+       * config/pa/pa64-hpux.opt (mgnu-ld): Likewise.
+       * config/picochip/picochip.opt (mlittle): Likewise.
+       * config/sh/sh.opt (mrenesas): Likewise.
+       * config/sparc/long-double-switch.opt (mlong-double-128): Likewise.
+       * config/sparc/sparc.opt (mhard-float): Likewise.
+       * config/v850/v850.opt (mv850es): Likewise.
+       * config/vax/vax.opt (mg-float): Likewise.
+
 2012-03-27  Martin Jambor  <mjambor@suse.cz>
 
        PR middle-end/52693

diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt
index 934aa35775e66b3376691796ba2ac1ee0b9be47d..e03a16337677cdec729d5692d1fd5bbe9ff7e086 100644 (file)
--- a/gcc/config/arm/arm.opt
+++ b/gcc/config/arm/arm.opt
@@ -59,7 +59,7 @@ Target Report Mask(ABORT_NORETURN)
 Generate a call to abort if a noreturn function returns
 
 mapcs
-Target RejectNegative Mask(APCS_FRAME) MaskExists Undocumented
+Target RejectNegative Mask(APCS_FRAME) Undocumented
 
 mapcs-float
 Target Report Mask(APCS_FLOAT)

diff --git a/gcc/config/cris/linux.opt b/gcc/config/cris/linux.opt
index a57c48d7ce8550a221e8d854b57fcb9c6b33bbb4..e93bb53a6fdb7bf024b07132b32c1be5ed16e282 100644 (file)
--- a/gcc/config/cris/linux.opt
+++ b/gcc/config/cris/linux.opt
@@ -23,7 +23,7 @@ mlinux
 Target Report RejectNegative Undocumented
 
 mno-gotplt
-Target Report RejectNegative Mask(AVOID_GOTPLT) MaskExists
+Target Report RejectNegative Mask(AVOID_GOTPLT)
 Together with -fpic and -fPIC, do not use GOTPLT references
 
 ; There's a small added setup cost with using GOTPLT references

diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index 29f1082b2d1076ec3bd48b4b1df094885ed129e1..965bef657b3832702da2b71107441d8788fc2fa8 100644 (file)
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -218,7 +218,7 @@ EnumValue
 Enum(fpmath_unit) String(both) Value({(enum fpmath_unit) (FPMATH_SSE | FPMATH_387)})
 
 mhard-float
-Target RejectNegative Mask(80387) MaskExists Save
+Target RejectNegative Mask(80387) Save
 Use hardware fp
 
 mieee-fp
@@ -469,11 +469,11 @@ Target Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
 
 msse4
-Target RejectNegative Report Mask(ISA_SSE4_2) MaskExists Var(ix86_isa_flags) Save
+Target RejectNegative Report Mask(ISA_SSE4_2) Var(ix86_isa_flags) Save
 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1 and SSE4.2 built-in functions and code generation
 
 mno-sse4
-Target RejectNegative Report InverseMask(ISA_SSE4_1) MaskExists Var(ix86_isa_flags) Save
+Target RejectNegative Report InverseMask(ISA_SSE4_1) Var(ix86_isa_flags) Save
 Do not support SSE4.1 and SSE4.2 built-in functions and code generation
 
 msse5

diff --git a/gcc/config/m68k/m68k.opt b/gcc/config/m68k/m68k.opt
index 14428fc4ccc8f840b1f2a27746fb549047533e0d..00bc2d541eff77519ca52c41dff849916d39417d 100644 (file)
--- a/gcc/config/m68k/m68k.opt
+++ b/gcc/config/m68k/m68k.opt
@@ -136,7 +136,7 @@ Target RejectNegative
 Generate code for a Fido A
 
 mhard-float
-Target RejectNegative Mask(HARD_FLOAT) MaskExists
+Target RejectNegative Mask(HARD_FLOAT)
 Generate code which uses hardware floating point instructions
 
 mid-shared-library

diff --git a/gcc/config/mep/mep.opt b/gcc/config/mep/mep.opt
index 38b8f80527bba674ae853f8a20f07d86fa4f8454..0ea19e6efaa2627a69ded76d8ddaa5657122ab2c 100644 (file)
--- a/gcc/config/mep/mep.opt
+++ b/gcc/config/mep/mep.opt
@@ -55,7 +55,7 @@ Target Mask(COP)
 Enable MeP Coprocessor
 
 mcop32
-Target Mask(COP) MaskExists RejectNegative
+Target Mask(COP) RejectNegative
 Enable MeP Coprocessor with 32-bit registers
 
 mcop64

diff --git a/gcc/config/pa/pa-hpux.opt b/gcc/config/pa/pa-hpux.opt
index ed5d6a4bd795eb4b5d5fc40a5f54dea9c2393baf..b709b83bf40b68d611e8827150075d0196e5bad2 100644 (file)
--- a/gcc/config/pa/pa-hpux.opt
+++ b/gcc/config/pa/pa-hpux.opt
@@ -23,7 +23,7 @@ Variable
 int flag_pa_unix = TARGET_HPUX_11_31 ? 2003 : TARGET_HPUX_11_11 ? 1998 : TARGET_HPUX_10_10 ? 1995 : 1993
 
 msio
-Target RejectNegative Mask(SIO) MaskExists
+Target RejectNegative Mask(SIO)
 Generate cpp defines for server IO
 
 munix=93

diff --git a/gcc/config/pa/pa64-hpux.opt b/gcc/config/pa/pa64-hpux.opt
index 36b1c61ea88fa59e7554e2563e71907883c4fbb7..56ca35ea9c6ad0cd5aa1e88437b1a0f1da226033 100644 (file)
--- a/gcc/config/pa/pa64-hpux.opt
+++ b/gcc/config/pa/pa64-hpux.opt
@@ -19,7 +19,7 @@
 ; <http://www.gnu.org/licenses/>.
 
 mgnu-ld
-Target RejectNegative Mask(GNU_LD) MaskExists
+Target RejectNegative Mask(GNU_LD)
 Assume code will be linked by GNU ld
 
 mhp-ld

diff --git a/gcc/config/picochip/picochip.opt b/gcc/config/picochip/picochip.opt
index 4726f499377adde5e5291d75004b8641a8b19e3e..a4b25e52f50f3c4fdab6a71c471fee0a8c795415 100644 (file)
--- a/gcc/config/picochip/picochip.opt
+++ b/gcc/config/picochip/picochip.opt
@@ -43,4 +43,4 @@ Target Mask(INEFFICIENT_WARNINGS)
 Generate warnings when inefficient code is known to be generated.
 
 minefficient
-Target Mask(INEFFICIENT_WARNINGS) MaskExists Undocumented
+Target Mask(INEFFICIENT_WARNINGS) Undocumented

diff --git a/gcc/config/rs6000/sysv4.opt b/gcc/config/rs6000/sysv4.opt
index 0d8d955af129fd9fad03c431719a6b11ec473c1e..474203d6adbb70f3934628dadb2322ac30631b89 100644 (file)
--- a/gcc/config/rs6000/sysv4.opt
+++ b/gcc/config/rs6000/sysv4.opt
@@ -66,7 +66,7 @@ Target Report RejectNegative Mask(LITTLE_ENDIAN)
 Produce little endian code
 
 mlittle
-Target Report RejectNegative Mask(LITTLE_ENDIAN) MaskExists
+Target Report RejectNegative Mask(LITTLE_ENDIAN)
 Produce little endian code
 
 mbig-endian

diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt
index 7f7af999299040f0c67caf5640c35c9e73589353..3ab2c51be4a220a2202c6ca6865e5338e232e9b3 100644 (file)
--- a/gcc/config/sh/sh.opt
+++ b/gcc/config/sh/sh.opt
@@ -316,7 +316,7 @@ Target Report RejectNegative Mask(RELAX)
 Shorten address references during linking
 
 mrenesas
-Target Mask(HITACHI) MaskExists
+Target Mask(HITACHI)
 Follow Renesas (formerly Hitachi) / SuperH calling conventions
 
 msoft-atomic

diff --git a/gcc/config/sparc/long-double-switch.opt b/gcc/config/sparc/long-double-switch.opt
index eb3c1a00f6827d98ab1f057cc6ab4f817358d4e6..8ad32bd6fe19c0513856b034daafe58c803fed54 100644 (file)
--- a/gcc/config/sparc/long-double-switch.opt
+++ b/gcc/config/sparc/long-double-switch.opt
@@ -19,7 +19,7 @@
 ; <http://www.gnu.org/licenses/>.
 
 mlong-double-128
-Target Report RejectNegative Mask(LONG_DOUBLE_128) MaskExists
+Target Report RejectNegative Mask(LONG_DOUBLE_128)
 Use 128-bit long double
 
 mlong-double-64

diff --git a/gcc/config/sparc/sparc.opt b/gcc/config/sparc/sparc.opt
index 01f3d43b2ca2737c7aea4eb27df1993a05efa416..58ba6b79da1e86db3ee4fc74346f79ad18f049bb 100644 (file)
--- a/gcc/config/sparc/sparc.opt
+++ b/gcc/config/sparc/sparc.opt
@@ -30,7 +30,7 @@ Target Report Mask(FPU)
 Use hardware FP
 
 mhard-float
-Target RejectNegative Mask(FPU) MaskExists
+Target RejectNegative Mask(FPU)
 Use hardware FP
 
 msoft-float

diff --git a/gcc/config/v850/v850.opt b/gcc/config/v850/v850.opt
index 12b0937391d48fe2393b52a8b1584a7b8f6b9d37..8fe244b03121f7fd2541d25281bda4fc57eab843 100644 (file)
--- a/gcc/config/v850/v850.opt
+++ b/gcc/config/v850/v850.opt
@@ -102,7 +102,7 @@ Target RejectNegative Mask(V850E1)
 Compile for the v850e1 processor
 
 mv850es
-Target RejectNegative Mask(V850E1) MaskExists
+Target RejectNegative Mask(V850E1)
 Compile for the v850es variant of the v850e1
 
 mv850e2

diff --git a/gcc/config/vax/vax.opt b/gcc/config/vax/vax.opt
index 82d6dee642293d080f007ae374fed94713064bc1..83527adfbea28278ec0d663b0a19db8bb812685b 100644 (file)
--- a/gcc/config/vax/vax.opt
+++ b/gcc/config/vax/vax.opt
@@ -31,7 +31,7 @@ Target RejectNegative Mask(G_FLOAT)
 Generate GFLOAT double precision code
 
 mg-float
-Target RejectNegative Mask(G_FLOAT) MaskExists
+Target RejectNegative Mask(G_FLOAT)
 Generate GFLOAT double precision code
 
 mgnu