]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
* doc/invoke.texi (-mcpu=power8): Document.
authorbergner <bergner@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 7 Nov 2012 19:49:51 +0000 (19:49 +0000)
committerbergner <bergner@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 7 Nov 2012 19:49:51 +0000 (19:49 +0000)
* config.in (HAVE_AS_POWER8): New.
* config.gcc: Add cpu_type power8.
* configure.ac: (HAVE_AS_POWER8): Check for assembler support for
the POWER8 instructions.
* configure: Regenerate.
* config/rs6000/rs6000.h: (ASM_CPU_POWER8_SPEC): Define.
(ASM_CPU_SPEC): Pass %(asm_cpu_power8) for -mcpu=power8.
(EXTRA_SPECS): Add asm_cpu_power8 spec string.
* config/rs6000/rs6000-cpus.def (processor_target_table): Alias
POWER8 to POWER7.
* config/rs6000/rs6000-tables.opt: Regenerate.
* config/rs6000/driver-rs6000.c (ASM_CPU_SPEC): For -mcpu=power8,
pass %(asm_cpu_power8)/-mpwr8.
* config/rs6000/aix53.h: Likewise.
* config/rs6000/aix61.h: Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@193307 138bc75d-0d04-0410-961f-82ee72b054a4

12 files changed:
gcc/ChangeLog
gcc/config.gcc
gcc/config.in
gcc/config/rs6000/aix53.h
gcc/config/rs6000/aix61.h
gcc/config/rs6000/driver-rs6000.c
gcc/config/rs6000/rs6000-cpus.def
gcc/config/rs6000/rs6000-tables.opt
gcc/config/rs6000/rs6000.h
gcc/configure
gcc/configure.ac
gcc/doc/invoke.texi

index b3cc1cf940b7f87e9fa045be26813082decbf181..ae956a5cf6353fb29413f05c0e9047a14df48e78 100644 (file)
@@ -1,3 +1,22 @@
+2012-11-07  Peter Bergner  <bergner@vnet.ibm.com>
+
+       * doc/invoke.texi (-mcpu=power8): Document.
+       * config.in (HAVE_AS_POWER8): New.
+       * config.gcc: Add cpu_type power8.
+       * configure.ac: (HAVE_AS_POWER8): Check for assembler support for
+       the POWER8 instructions.
+       * configure: Regenerate.
+       * config/rs6000/rs6000.h: (ASM_CPU_POWER8_SPEC): Define.
+       (ASM_CPU_SPEC): Pass %(asm_cpu_power8) for -mcpu=power8.
+       (EXTRA_SPECS): Add asm_cpu_power8 spec string.
+       * config/rs6000/rs6000-cpus.def (processor_target_table): Alias
+       POWER8 to POWER7.
+       * config/rs6000/rs6000-tables.opt: Regenerate.
+       * config/rs6000/driver-rs6000.c (ASM_CPU_SPEC): For -mcpu=power8,
+       pass %(asm_cpu_power8)/-mpwr8.
+       * config/rs6000/aix53.h: Likewise.
+       * config/rs6000/aix61.h: Likewise.
+
 2012-11-07  Uros Bizjak  <ubizjak@gmail.com>
 
        PR target/55224
index 00372290579bc3f814871d2af48a579062ca8072..b0f6f1d0c4aa134f5f54d171deeca8d7ff8161b9 100644 (file)
@@ -424,7 +424,7 @@ powerpc*-*-*)
        extra_headers="ppc-asm.h altivec.h spe.h ppu_intrinsics.h paired.h spu2vmx.h vec_types.h si2vmx.h"
        need_64bit_hwint=yes
        case x$with_cpu in
-           xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[34567]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|Xe6500)
+           xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[345678]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|Xe6500)
                cpu_is_64bit=yes
                ;;
        esac
@@ -3460,7 +3460,7 @@ case "${target}" in
                                eval "with_$which=405"
                                ;;
                        "" | common \
-                       | power | power[234567] | power6x | powerpc | powerpc64 \
+                       | power | power[2345678] | power6x | powerpc | powerpc64 \
                        | rios | rios1 | rios2 | rsc | rsc1 | rs64a \
                        | 401 | 403 | 405 | 405fp | 440 | 440fp | 464 | 464fp \
                        | 476 | 476fp | 505 | 601 | 602 | 603 | 603e | ec603e \
index b13805d98ce9efdd14ec721cf051aea2e7dfc859..ee2a4d8b57c1affff1df120a9c84a8828c7637f8 100644 (file)
 #endif
 
 
+/* Define if your assembler supports POWER8 instructions. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_AS_POWER8
+#endif
+
+
 /* Define if your assembler supports .ref */
 #ifndef USED_FOR_TARGET
 #undef HAVE_AS_REF
index 7faba7318465883b72a2a4f8277932270d99c72e..baafb51af295858a08c4e594e798d614df3ddeed 100644 (file)
@@ -62,6 +62,7 @@ do {                                                                  \
 %{mcpu=power6: -mpwr6} \
 %{mcpu=power6x: -mpwr6} \
 %{mcpu=power7: -mpwr7} \
+%{mcpu=power8: -mpwr8} \
 %{mcpu=powerpc: -mppc} \
 %{mcpu=rs64a: -mppc} \
 %{mcpu=603: -m603} \
index 8de6fee3fd909633989d1df5264e11bd713a57e5..3fa48a8b9f6cbc5b2bb249539b1951fe0e24d3c6 100644 (file)
@@ -62,6 +62,7 @@ do {                                                                  \
 %{mcpu=power6: -mpwr6} \
 %{mcpu=power6x: -mpwr6} \
 %{mcpu=power7: -mpwr7} \
+%{mcpu=power8: -mpwr8} \
 %{mcpu=powerpc: -mppc} \
 %{mcpu=rs64a: -mppc} \
 %{mcpu=603: -m603} \
index 5f24ee7d23d4cc5937099cb03a6c756d2a1b3e92..13381168e8ef2e5e35788551aa85c7cd2d9a1fdf 100644 (file)
@@ -354,6 +354,7 @@ static const struct asm_name asm_names[] = {
   { "power6",  "-mpwr6" },
   { "power6x", "-mpwr6" },
   { "power7",  "-mpwr7" },
+  { "power8",  "-mpwr8" },
   { "powerpc", "-mppc" },
   { "rs64a",   "-mppc" },
   { "603",     "-m603" },
@@ -379,6 +380,7 @@ static const struct asm_name asm_names[] = {
   { "power6",  "%(asm_cpu_power6) -maltivec" },
   { "power6x", "%(asm_cpu_power6) -maltivec" },
   { "power7",  "%(asm_cpu_power7)" },
+  { "power8",  "%(asm_cpu_power8)" },
   { "powerpc", "-mppc" },
   { "rs64a",   "-mppc64" },
   { "401",     "-mppc" },
index a0aadf1cf3eafd75c2052dc5aeec7a8b3a014387..9119f30d89470699cbb3cc2c7ce7748e2f4ab28e 100644 (file)
@@ -166,6 +166,10 @@ RS6000_CPU ("power7", PROCESSOR_POWER7,   /* Don't add MASK_ISEL by default */
            POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF
            | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP | MASK_POPCNTD
            | MASK_VSX | MASK_RECIP_PRECISION)
+RS6000_CPU ("power8", PROCESSOR_POWER7,   /* Don't add MASK_ISEL by default */
+           POWERPC_7400_MASK | MASK_POWERPC64 | MASK_PPC_GPOPT | MASK_MFCRF
+           | MASK_POPCNTB | MASK_FPRND | MASK_CMPB | MASK_DFP | MASK_POPCNTD
+           | MASK_VSX | MASK_RECIP_PRECISION)
 RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
 RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, MASK_PPC_GFXOPT | MASK_POWERPC64)
 RS6000_CPU ("rs64", PROCESSOR_RS64A, MASK_PPC_GFXOPT | MASK_POWERPC64)
index f63d9c4f6cc2f17cc18f3388915603dc1d74ae7d..001988140d29fa7d68e0b9dd4be0f46190464620 100644 (file)
@@ -177,11 +177,14 @@ EnumValue
 Enum(rs6000_cpu_opt_value) String(power7) Value(49)
 
 EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc) Value(50)
+Enum(rs6000_cpu_opt_value) String(power8) Value(50)
 
 EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc64) Value(51)
+Enum(rs6000_cpu_opt_value) String(powerpc) Value(51)
 
 EnumValue
-Enum(rs6000_cpu_opt_value) String(rs64) Value(52)
+Enum(rs6000_cpu_opt_value) String(powerpc64) Value(52)
+
+EnumValue
+Enum(rs6000_cpu_opt_value) String(rs64) Value(53)
 
index d299e6313704d6b35565f25befbf4f39c2441498..f7b0be277769d9895b7b82984c95d9d9342400fd 100644 (file)
 #define ASM_CPU_POWER7_SPEC "-mpower4 -maltivec"
 #endif
 
+#ifdef HAVE_AS_POWER8
+#define ASM_CPU_POWER8_SPEC "-mpower8"
+#else
+#define ASM_CPU_POWER8_SPEC "-mpower4 -maltivec"
+#endif
+
 #ifdef HAVE_AS_DCI
 #define ASM_CPU_476_SPEC "-m476"
 #else
 %{mcpu=power6: %(asm_cpu_power6) -maltivec} \
 %{mcpu=power6x: %(asm_cpu_power6) -maltivec} \
 %{mcpu=power7: %(asm_cpu_power7)} \
+%{mcpu=power8: %(asm_cpu_power8)} \
 %{mcpu=a2: -ma2} \
 %{mcpu=powerpc: -mppc} \
 %{mcpu=rs64a: -mppc64} \
   { "asm_cpu_power5",          ASM_CPU_POWER5_SPEC },                  \
   { "asm_cpu_power6",          ASM_CPU_POWER6_SPEC },                  \
   { "asm_cpu_power7",          ASM_CPU_POWER7_SPEC },                  \
+  { "asm_cpu_power8",          ASM_CPU_POWER8_SPEC },                  \
   { "asm_cpu_476",             ASM_CPU_476_SPEC },                     \
   SUBTARGET_EXTRA_SPECS
 
index 681aba930c416b61c5f9931ff85749cbce5dc980..55164b66c9205a8af04967d1ef85d49feaf19076 100755 (executable)
@@ -25210,6 +25210,48 @@ if test $gcc_cv_as_powerpc_popcntd = yes; then
 
 $as_echo "#define HAVE_AS_POPCNTD 1" >>confdefs.h
 
+fi
+
+    case $target in
+      *-*-aix*) conftest_s='   .machine "pwr8"
+       .csect .text[PR]';;
+      *) conftest_s='  .machine power8
+       .text';;
+    esac
+
+    { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for power8 support" >&5
+$as_echo_n "checking assembler for power8 support... " >&6; }
+if test "${gcc_cv_as_powerpc_power8+set}" = set; then :
+  $as_echo_n "(cached) " >&6
+else
+  gcc_cv_as_powerpc_power8=no
+    if test $in_tree_gas = yes; then
+    if test $gcc_cv_gas_vers -ge `expr \( \( 2 \* 1000 \) + 19 \) \* 1000 + 2`
+  then gcc_cv_as_powerpc_power8=yes
+fi
+  elif test x$gcc_cv_as != x; then
+    $as_echo "$conftest_s" > conftest.s
+    if { ac_try='$gcc_cv_as $gcc_cv_as_flags -a32 -o conftest.o conftest.s >&5'
+  { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+  (eval $ac_try) 2>&5
+  ac_status=$?
+  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+  test $ac_status = 0; }; }
+    then
+       gcc_cv_as_powerpc_power8=yes
+    else
+      echo "configure: failed program was" >&5
+      cat conftest.s >&5
+    fi
+    rm -f conftest.o conftest.s
+  fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_powerpc_power8" >&5
+$as_echo "$gcc_cv_as_powerpc_power8" >&6; }
+if test $gcc_cv_as_powerpc_power8 = yes; then
+
+$as_echo "#define HAVE_AS_POWER8 1" >>confdefs.h
+
 fi
 
     case $target in
index f629d1561222f9e9b9fb64c1bef247c3c9897ca1..fbda2cc02079e974092c39f33121d6d4cefe991e 100644 (file)
@@ -3863,6 +3863,19 @@ LCF0:
       [AC_DEFINE(HAVE_AS_POPCNTD, 1,
          [Define if your assembler supports POPCNTD instructions.])])
 
+    case $target in
+      *-*-aix*) conftest_s='   .machine "pwr8"
+       .csect .text[[PR]]';;
+      *) conftest_s='  .machine power8
+       .text';;
+    esac
+
+    gcc_GAS_CHECK_FEATURE([power8 support],
+      gcc_cv_as_powerpc_power8, [2,19,2], -a32,
+      [$conftest_s],,
+      [AC_DEFINE(HAVE_AS_POWER8, 1,
+         [Define if your assembler supports POWER8 instructions.])])
+
     case $target in
       *-*-aix*) conftest_s='   .csect .text[[PR]]
        lwsync';;
index 31f16330245757f9ea69c25f34270ed54b723a7f..f6d3a588809771b2ac45ce422dc710f056426b09 100644 (file)
@@ -17101,7 +17101,7 @@ Supported values for @var{cpu_type} are @samp{401}, @samp{403},
 @samp{e300c3}, @samp{e500mc}, @samp{e500mc64}, @samp{e5500},
 @samp{e6500}, @samp{ec603e}, @samp{G3}, @samp{G4}, @samp{G5},
 @samp{titan}, @samp{power3}, @samp{power4}, @samp{power5}, @samp{power5+},
-@samp{power6}, @samp{power6x}, @samp{power7}, @samp{powerpc},
+@samp{power6}, @samp{power6x}, @samp{power7}, @samp{power8}, @samp{powerpc},
 @samp{powerpc64}, and @samp{rs64}.
 
 @option{-mcpu=powerpc}, and @option{-mcpu=powerpc64} specify pure 32-bit
@@ -17903,9 +17903,9 @@ which handle the double-precision reciprocal square root calculations.
 @opindex mrecip-precision
 Assume (do not assume) that the reciprocal estimate instructions
 provide higher-precision estimates than is mandated by the PowerPC
-ABI.  Selecting @option{-mcpu=power6} or @option{-mcpu=power7}
-automatically selects @option{-mrecip-precision}.  The double-precision 
-square root estimate instructions are not generated by
+ABI.  Selecting @option{-mcpu=power6}, @option{-mcpu=power7} or
+@option{-mcpu=power8} automatically selects @option{-mrecip-precision}.
+The double-precision square root estimate instructions are not generated by
 default on low-precision machines, since they do not provide an
 estimate that converges after three steps.