arm64: dts: qcom: sm8250: Add OPP table support to UFSHC

UFS host controller, when scaling gears, should choose appropriate
performance state of RPMh power domain controller along with clock
frequency. So let's add the OPP table support to specify both clock
frequency and RPMh performance states replacing the old "freq-table-hz"
property.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20231012172129.65172-6-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 125f5fb0e4e561d7ae77a6681b950db2d76b17ef..f8abf9566024cf711eae107fa0ed2770443cdb39 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -2463,21 +2463,42 @@
                                <&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
                                <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
                                <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>;
-                       freq-table-hz =
-                               <37500000 300000000>,
-                               <0 0>,
-                               <0 0>,
-                               <37500000 300000000>,
-                               <0 0>,
-                               <0 0>,
-                               <0 0>,
-                               <0 0>;
+
+                       operating-points-v2 = <&ufs_opp_table>;
 
                        interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI_CH0 0>,
                                        <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_UFS_MEM_CFG 0>;
                        interconnect-names = "ufs-ddr", "cpu-ufs";
 
                        status = "disabled";
+
+                       ufs_opp_table: opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-37500000 {
+                                       opp-hz = /bits/ 64 <37500000>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <37500000>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>;
+                                       required-opps = <&rpmhpd_opp_low_svs>;
+                               };
+
+                               opp-300000000 {
+                                       opp-hz = /bits/ 64 <300000000>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <300000000>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>;
+                                       required-opps = <&rpmhpd_opp_nom>;
+                               };
+                       };
                };
 
                ufs_mem_phy: phy@1d87000 {