* config/tc-mips.c (NO_ISA_COP): New macro.

	(COP_INSN): New macro.
	(is_opcode_valid): Use them.
	(macro) <ld_st>: Use them.  Don't accept coprocessor load store
	insns based on the ISA if CPU is NO_ISA_COP.
	<copz>: Likewise for coprocessor operations.

testsuite/
	* gas/mips/mips1-fp.s, gas/mips/mips1-fp.d, gas/mips/mips1-fp.l:
	New tests.
	* gas/mips/mips.exp: Run them.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 78af3f72b17b9c72e9c3bbcc497fc57af56c6153..d4e776058f3403a5f150e86274e10941fca594fb 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2009-01-08  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * config/tc-mips.c (NO_ISA_COP): New macro.
+       (COP_INSN): New macro.
+       (is_opcode_valid): Use them.
+       (macro) <ld_st>: Use them.  Don't accept coprocessor load store
+       insns based on the ISA if CPU is NO_ISA_COP.
+       <copz>: Likewise for coprocessor operations.
+
 2008-10-09  Eric Botcazou  <ebotcazou@adacore.com>
 
        * dw2gencfi.c (cfi_finish): Deal with md_fix_up_eh_frame.

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index f55961b413d7f2778dcf9e460aa5e8884ae3d04c..3cdf97bf0edc9efa73b91d000ca06007ac571464 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -514,12 +514,11 @@ static int mips_32bitmode = 0;
 /* Returns true for a (non floating-point) coprocessor instruction.  Reading
    or writing the condition code is only possible on the coprocessors and
    these insns are not marked with INSN_COP.  Thus for these insns use the
-   condition-code flags unless this is the floating-point coprocessor.  */
+   condition-code flags.  */
 #define COP_INSN(PINFO)                                                        \
   (PINFO != INSN_MACRO                                                 \
-   && (((PINFO) & INSN_COP)                                            \
-       || ((PINFO) & (INSN_READ_COND_CODE | INSN_WRITE_COND_CODE)      \
-          && ((PINFO) & (FP_S | FP_D)) == 0)))
+   && ((PINFO) & (FP_S | FP_D)) == 0                                   \
+   && ((PINFO) & (INSN_COP | INSN_READ_COND_CODE | INSN_WRITE_COND_CODE)))
 
 /* MIPS PIC level.  */
 

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 0ecd515ca5b4ef4037dad469a744155e061ef66a..68e344f14e5c3d099a54c9a1c33850f3ff0dff35 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2009-01-08  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * gas/mips/mips1-fp.s, gas/mips/mips1-fp.d, gas/mips/mips1-fp.l:
+       New tests.
+       * gas/mips/mips.exp: Run them.
+
 2008-09-15  Alan Modra  <amodra@bigpond.net.au>
 
        * gas/all/gas.exp: Don't run redef tests on a bunch of targets.

diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index e48b81f08c96dcb74874ff0d8908d6adecf07e8a..5fc23e8f820864f3c4b80c496b0df01e8787745d 100644 (file)
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -398,6 +398,9 @@ if { [istarget mips*-*-vxworks*] } {
     run_dump_test_arches "abs"         [mips_arch_list_matching mips1]
     run_dump_test_arches "add"         [mips_arch_list_matching mips1]
     run_dump_test_arches "and"         [mips_arch_list_matching mips1]
+    run_dump_test_arches "mips1-fp"    [mips_arch_list_matching mips1]
+    run_list_test_arches "mips1-fp" "-32 -msoft-float" \
+                                       [mips_arch_list_matching mips1]
     run_dump_test "break20"
     run_dump_test "trap20"