gcc/

	PR rtl-optimization/69032
	* sel-sched-ir.c (get_seqno_by_preds): Include both insn and head when
	looping backwards over basic block insns.

testsuite/

	PR rtl-optimization/69032
	* gcc.dg/pr69032.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@234219 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ac70e8ac8d9253ed6d9e325228811abc7e958b81..de099d671b28d475c11d0388e2110031dfa24897 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2016-03-15  Andrey Belevantsev  <abel@ispras.ru>
+
+       PR rtl-optimization/69032
+       * sel-sched-ir.c (get_seqno_by_preds): Include both insn and head when
+       looping backwards over basic block insns. 
+
+2016-03-15  Andrey Belevantsev  <abel@ispras.ru>
+
+       PR target/66660
+       * sel-sched-ir.c (merge_expr): Avoid changing the speculative pattern
+       to non-speculative when propagating trap bits. 
+
 2016-03-15  Andrey Belevantsev  <abel@ispras.ru>
 
        PR rtl-optimization/63384

diff --git a/gcc/sel-sched-ir.c b/gcc/sel-sched-ir.c
index 9507853ba42c1bea0e79b7182848ee1ca2df5a12..83f813aa57140afcc666c4dd217a215eec4b6803 100644 (file)
--- a/gcc/sel-sched-ir.c
+++ b/gcc/sel-sched-ir.c
@@ -4106,11 +4106,14 @@ get_seqno_by_preds (rtx_insn *insn)
   insn_t *preds;
   int n, i, seqno;
 
-  while (tmp != head)
+  /* Loop backwards from INSN to HEAD including both.  */
+  while (1)
     {
-      tmp = PREV_INSN (tmp);
       if (INSN_P (tmp))
-        return INSN_SEQNO (tmp);
+       return INSN_SEQNO (tmp);
+      if (tmp == head)
+       break;
+      tmp = PREV_INSN (tmp);
     }
 
   cfg_preds (bb, &preds, &n);

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9259910cb5e3a71742b44e6c92604a6e3b693b73..44f57339d799a6ced354a62782e4b449f87facc7 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-03-15  Andrey Belevantsev  <abel@ispras.ru>
+
+       PR rtl-optimization/69032
+       * gcc.dg/pr69032.c: New test.
+
 2016-03-15  Andrey Belevantsev  <abel@ispras.ru>
 
        PR rtl-optimization/63384

diff --git a/gcc/testsuite/gcc.dg/pr69032.c b/gcc/testsuite/gcc.dg/pr69032.c
new file mode 100644 (file)
index 0000000..e0925cd
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr69032.c
@@ -0,0 +1,11 @@
+/* { dg-do compile { target powerpc*-*-* ia64-*-* i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -fsched-pressure -fsel-sched-pipelining -fselective-scheduling" } */
+
+void foo (long long i)
+{
+   while (i != -1)
+     {
+       ++i;
+        __asm__ ("");
+     }
+}