thermal/drivers/mediatek/lvts_thermal: Add lvts commands and their sizes to driver...

commit 6203a5e6fd090ed05f6d9b92e33bc7e7679a3dd6 upstream.

Add LVTS commands and their sizes to driver data in preparation for
adding different commands.

Signed-off-by: Mason Chang <mason-cw.chang@mediatek.com>
Link: https://lore.kernel.org/r/20250526102659.30225-3-mason-cw.chang@mediatek.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/thermal/mediatek/lvts_thermal.c b/drivers/thermal/mediatek/lvts_thermal.c
index c24b76bcd18aa1cfd03105f56890fb38059d3615..239476152bab104e633721b7a3c2d6117108e6e1 100644 (file)
--- a/drivers/thermal/mediatek/lvts_thermal.c
+++ b/drivers/thermal/mediatek/lvts_thermal.c
@@ -92,17 +92,6 @@
 
 #define LVTS_MINIMUM_THRESHOLD         20000
 
-static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
-/*
- * Write device mask: 0xC1030000
- */
-static const u32 default_init_cmds[] = {
-       0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
-       0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
-       0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
-       0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
-};
-
 static int golden_temp = LVTS_GOLDEN_TEMP_DEFAULT;
 static int golden_temp_offset;
 
@@ -132,7 +121,11 @@ struct lvts_ctrl_data {
 
 struct lvts_data {
        const struct lvts_ctrl_data *lvts_ctrl;
+       const u32 *conn_cmd;
+       const u32 *init_cmd;
        int num_lvts_ctrl;
+       int num_conn_cmd;
+       int num_init_cmd;
        int temp_factor;
        int temp_offset;
        int gt_calib_bit_offset;
@@ -974,9 +967,10 @@ static int lvts_ctrl_set_enable(struct lvts_ctrl *lvts_ctrl, int enable)
 
 static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
 {
+       const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
        u32 id;
 
-       lvts_write_config(lvts_ctrl, default_conn_cmds, ARRAY_SIZE(default_conn_cmds));
+       lvts_write_config(lvts_ctrl, lvts_data->conn_cmd, lvts_data->num_conn_cmd);
 
        /*
         * LVTS_ID : Get ID and status of the thermal controller
@@ -995,7 +989,9 @@ static int lvts_ctrl_connect(struct device *dev, struct lvts_ctrl *lvts_ctrl)
 
 static int lvts_ctrl_initialize(struct device *dev, struct lvts_ctrl *lvts_ctrl)
 {
-       lvts_write_config(lvts_ctrl, default_init_cmds, ARRAY_SIZE(default_init_cmds));
+       const struct lvts_data *lvts_data = lvts_ctrl->lvts_data;
+
+       lvts_write_config(lvts_ctrl, lvts_data->init_cmd, lvts_data->num_init_cmd);
 
        return 0;
 }
@@ -1424,6 +1420,17 @@ static int lvts_resume(struct device *dev)
        return 0;
 }
 
+static const u32 default_conn_cmds[] = { 0xC103FFFF, 0xC502FF55 };
+/*
+ * Write device mask: 0xC1030000
+ */
+static const u32 default_init_cmds[] = {
+       0xC1030E01, 0xC1030CFC, 0xC1030A8C, 0xC103098D, 0xC10308F1,
+       0xC10307A6, 0xC10306B8, 0xC1030500, 0xC1030420, 0xC1030300,
+       0xC1030030, 0xC10300F6, 0xC1030050, 0xC1030060, 0xC10300AC,
+       0xC10300FC, 0xC103009D, 0xC10300F1, 0xC10300E1
+};
+
 /*
  * The MT8186 calibration data is stored as packed 3-byte little-endian
  * values using a weird layout that makes sense only when viewed as a 32-bit
@@ -1718,7 +1725,11 @@ static const struct lvts_ctrl_data mt8195_lvts_ap_data_ctrl[] = {
 
 static const struct lvts_data mt7988_lvts_ap_data = {
        .lvts_ctrl      = mt7988_lvts_ap_data_ctrl,
+       .conn_cmd       = default_conn_cmds,
+       .init_cmd       = default_init_cmds,
        .num_lvts_ctrl  = ARRAY_SIZE(mt7988_lvts_ap_data_ctrl),
+       .num_conn_cmd   = ARRAY_SIZE(default_conn_cmds),
+       .num_init_cmd   = ARRAY_SIZE(default_init_cmds),
        .temp_factor    = LVTS_COEFF_A_MT7988,
        .temp_offset    = LVTS_COEFF_B_MT7988,
        .gt_calib_bit_offset = 24,
@@ -1726,7 +1737,11 @@ static const struct lvts_data mt7988_lvts_ap_data = {
 
 static const struct lvts_data mt8186_lvts_data = {
        .lvts_ctrl      = mt8186_lvts_data_ctrl,
+       .conn_cmd       = default_conn_cmds,
+       .init_cmd       = default_init_cmds,
        .num_lvts_ctrl  = ARRAY_SIZE(mt8186_lvts_data_ctrl),
+       .num_conn_cmd   = ARRAY_SIZE(default_conn_cmds),
+       .num_init_cmd   = ARRAY_SIZE(default_init_cmds),
        .temp_factor    = LVTS_COEFF_A_MT7988,
        .temp_offset    = LVTS_COEFF_B_MT7988,
        .gt_calib_bit_offset = 24,
@@ -1735,7 +1750,11 @@ static const struct lvts_data mt8186_lvts_data = {
 
 static const struct lvts_data mt8188_lvts_mcu_data = {
        .lvts_ctrl      = mt8188_lvts_mcu_data_ctrl,
+       .conn_cmd       = default_conn_cmds,
+       .init_cmd       = default_init_cmds,
        .num_lvts_ctrl  = ARRAY_SIZE(mt8188_lvts_mcu_data_ctrl),
+       .num_conn_cmd   = ARRAY_SIZE(default_conn_cmds),
+       .num_init_cmd   = ARRAY_SIZE(default_init_cmds),
        .temp_factor    = LVTS_COEFF_A_MT8195,
        .temp_offset    = LVTS_COEFF_B_MT8195,
        .gt_calib_bit_offset = 20,
@@ -1744,7 +1763,11 @@ static const struct lvts_data mt8188_lvts_mcu_data = {
 
 static const struct lvts_data mt8188_lvts_ap_data = {
        .lvts_ctrl      = mt8188_lvts_ap_data_ctrl,
+       .conn_cmd       = default_conn_cmds,
+       .init_cmd       = default_init_cmds,
        .num_lvts_ctrl  = ARRAY_SIZE(mt8188_lvts_ap_data_ctrl),
+       .num_conn_cmd   = ARRAY_SIZE(default_conn_cmds),
+       .num_init_cmd   = ARRAY_SIZE(default_init_cmds),
        .temp_factor    = LVTS_COEFF_A_MT8195,
        .temp_offset    = LVTS_COEFF_B_MT8195,
        .gt_calib_bit_offset = 20,
@@ -1753,7 +1776,11 @@ static const struct lvts_data mt8188_lvts_ap_data = {
 
 static const struct lvts_data mt8192_lvts_mcu_data = {
        .lvts_ctrl      = mt8192_lvts_mcu_data_ctrl,
+       .conn_cmd       = default_conn_cmds,
+       .init_cmd       = default_init_cmds,
        .num_lvts_ctrl  = ARRAY_SIZE(mt8192_lvts_mcu_data_ctrl),
+       .num_conn_cmd   = ARRAY_SIZE(default_conn_cmds),
+       .num_init_cmd   = ARRAY_SIZE(default_init_cmds),
        .temp_factor    = LVTS_COEFF_A_MT8195,
        .temp_offset    = LVTS_COEFF_B_MT8195,
        .gt_calib_bit_offset = 24,
@@ -1762,7 +1789,11 @@ static const struct lvts_data mt8192_lvts_mcu_data = {
 
 static const struct lvts_data mt8192_lvts_ap_data = {
        .lvts_ctrl      = mt8192_lvts_ap_data_ctrl,
+       .conn_cmd       = default_conn_cmds,
+       .init_cmd       = default_init_cmds,
        .num_lvts_ctrl  = ARRAY_SIZE(mt8192_lvts_ap_data_ctrl),
+       .num_conn_cmd   = ARRAY_SIZE(default_conn_cmds),
+       .num_init_cmd   = ARRAY_SIZE(default_init_cmds),
        .temp_factor    = LVTS_COEFF_A_MT8195,
        .temp_offset    = LVTS_COEFF_B_MT8195,
        .gt_calib_bit_offset = 24,
@@ -1771,7 +1802,11 @@ static const struct lvts_data mt8192_lvts_ap_data = {
 
 static const struct lvts_data mt8195_lvts_mcu_data = {
        .lvts_ctrl      = mt8195_lvts_mcu_data_ctrl,
+       .conn_cmd       = default_conn_cmds,
+       .init_cmd       = default_init_cmds,
        .num_lvts_ctrl  = ARRAY_SIZE(mt8195_lvts_mcu_data_ctrl),
+       .num_conn_cmd   = ARRAY_SIZE(default_conn_cmds),
+       .num_init_cmd   = ARRAY_SIZE(default_init_cmds),
        .temp_factor    = LVTS_COEFF_A_MT8195,
        .temp_offset    = LVTS_COEFF_B_MT8195,
        .gt_calib_bit_offset = 24,
@@ -1780,7 +1815,11 @@ static const struct lvts_data mt8195_lvts_mcu_data = {
 
 static const struct lvts_data mt8195_lvts_ap_data = {
        .lvts_ctrl      = mt8195_lvts_ap_data_ctrl,
+       .conn_cmd       = default_conn_cmds,
+       .init_cmd       = default_init_cmds,
        .num_lvts_ctrl  = ARRAY_SIZE(mt8195_lvts_ap_data_ctrl),
+       .num_conn_cmd   = ARRAY_SIZE(default_conn_cmds),
+       .num_init_cmd   = ARRAY_SIZE(default_init_cmds),
        .temp_factor    = LVTS_COEFF_A_MT8195,
        .temp_offset    = LVTS_COEFF_B_MT8195,
        .gt_calib_bit_offset = 24,