]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
media: imx-mipi-csis: Log per-lane start of transmission errors
authorLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Fri, 22 Aug 2025 00:27:28 +0000 (03:27 +0300)
committerHans Verkuil <hverkuil+cisco@kernel.org>
Sun, 31 Aug 2025 09:10:07 +0000 (11:10 +0200)
The CSIS has per-line start of transmission error interrupts. Log them
all, instead of only the first data lane.

Link: https://lore.kernel.org/r/20250822002734.23516-9-laurent.pinchart@ideasonboard.com
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
drivers/media/platform/nxp/imx-mipi-csis.c

index 346599b7a5176ee22ae630f23a995c15c85b5c5d..77f1bf05b520f92c91ab9f44f40f82c83e386135 100644 (file)
@@ -99,7 +99,7 @@
 #define MIPI_CSIS_INT_SRC_NON_IMAGE_DATA       (0xf << 28)
 #define MIPI_CSIS_INT_SRC_FRAME_START          BIT(24)
 #define MIPI_CSIS_INT_SRC_FRAME_END            BIT(20)
-#define MIPI_CSIS_INT_SRC_ERR_SOT_HS           BIT(16)
+#define MIPI_CSIS_INT_SRC_ERR_SOT_HS(n)                BIT((n) + 16)
 #define MIPI_CSIS_INT_SRC_ERR_LOST_FS          BIT(12)
 #define MIPI_CSIS_INT_SRC_ERR_LOST_FE          BIT(8)
 #define MIPI_CSIS_INT_SRC_ERR_OVER             BIT(4)
@@ -240,7 +240,10 @@ struct mipi_csis_event {
 
 static const struct mipi_csis_event mipi_csis_events[] = {
        /* Errors */
-       { false, MIPI_CSIS_INT_SRC_ERR_SOT_HS,          "SOT Error" },
+       { false, MIPI_CSIS_INT_SRC_ERR_SOT_HS(0),       "SOT 0 Error" },
+       { false, MIPI_CSIS_INT_SRC_ERR_SOT_HS(1),       "SOT 1 Error" },
+       { false, MIPI_CSIS_INT_SRC_ERR_SOT_HS(2),       "SOT 2 Error" },
+       { false, MIPI_CSIS_INT_SRC_ERR_SOT_HS(3),       "SOT 3 Error" },
        { false, MIPI_CSIS_INT_SRC_ERR_LOST_FS,         "Lost Frame Start Error" },
        { false, MIPI_CSIS_INT_SRC_ERR_LOST_FE,         "Lost Frame End Error" },
        { false, MIPI_CSIS_INT_SRC_ERR_OVER,            "FIFO Overflow Error" },