arm64: dts: cix: add DT nodes for SPI

Add the device tree node for the spi controller of the CIX SKY1 SoC.

Signed-off-by: Jun Guo <jun.guo@cixtech.com>
Link: https://lore.kernel.org/r/20250919013118.853078-1-jun.guo@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>

diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index 2fb2c99c0796d41f4c681bb538533d6a312866bb..ea324336bf343e511c5bcfe456ee93505eff3112 100644 (file)
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi
@@ -264,6 +264,26 @@
                        status = "disabled";
                };
 
+               spi0: spi@4090000 {
+                       compatible = "cdns,spi-r1p6";
+                       reg = <0x0 0x04090000 0x0 0x10000>;
+                       clocks = <&scmi_clk CLK_TREE_FCH_SPI0_APB>,
+                                <&scmi_clk CLK_TREE_FCH_SPI0_APB>;
+                       clock-names = "ref_clk", "pclk";
+                       interrupts = <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH 0>;
+                       status = "disabled";
+               };
+
+               spi1: spi@40a0000 {
+                       compatible = "cdns,spi-r1p6";
+                       reg = <0x0 0x040a0000 0x0 0x10000>;
+                       clocks = <&scmi_clk CLK_TREE_FCH_SPI1_APB>,
+                                <&scmi_clk CLK_TREE_FCH_SPI1_APB>;
+                       clock-names = "ref_clk", "pclk";
+                       interrupts = <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH 0>;
+                       status = "disabled";
+               };
+
                uart0: serial@40b0000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x0 0x040b0000 0x0 0x1000>;