arm64: dts: renesas: falcon-csi-dsi: Set bus-type for MAX96712

Specify the bus-type property for all three connected MAX96712.

The default behavior when parsing a node without this property is to
default to D-PHY.  Making this explicit plays it safe and future proofs
things as the default parsing comes from the V4L2 core and not the
driver itself.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230331141431.3820311-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-csi-dsi.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-csi-dsi.dtsi
index e06b8eda85e18155ebcaccc314dad1dab59e56b1..dbc8dcab109d15db556bd079b66642b3af6dfa18 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-csi-dsi.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-csi-dsi.dtsi
@@ -5,6 +5,8 @@
  * Copyright (C) 2021 Glider bv
  */
 
+#include <dt-bindings/media/video-interfaces.h>
+
 &csi40 {
        status = "okay";
 
@@ -105,6 +107,7 @@
                        port@4 {
                                reg = <4>;
                                max96712_out0: endpoint {
+                                       bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
                                        clock-lanes = <0>;
                                        data-lanes = <1 2 3 4>;
                                        remote-endpoint = <&csi40_in>;
@@ -125,6 +128,7 @@
                        port@4 {
                                reg = <4>;
                                max96712_out1: endpoint {
+                                       bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
                                        clock-lanes = <0>;
                                        data-lanes = <1 2 3 4>;
                                        lane-polarities = <0 0 0 0 1>;
@@ -146,6 +150,7 @@
                        port@4 {
                                reg = <4>;
                                max96712_out2: endpoint {
+                                       bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
                                        clock-lanes = <0>;
                                        data-lanes = <1 2 3 4>;
                                        lane-polarities = <0 0 0 0 1>;