]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
wifi: rtw89: 8852bt: rfk: add RCK
authorPing-Ke Shih <pkshih@realtek.com>
Thu, 27 Jun 2024 02:58:49 +0000 (10:58 +0800)
committerPing-Ke Shih <pkshih@realtek.com>
Tue, 2 Jul 2024 11:43:54 +0000 (19:43 +0800)
RCK is synchronize RC calibration. Driver triggers this calibration and
writes the result to registers.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20240627025849.25198-5-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c
drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.h

index 6c2fecb58940777384d0c740b7693aea75c8f9fb..fa0e49d581126d036e2e064f7fed15c26d6a71a8 100644 (file)
@@ -407,6 +407,41 @@ static void _rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy)
        }
 }
 
+static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)
+{
+       u32 rf_reg5;
+       u32 rck_val;
+       u32 val;
+       int ret;
+
+       rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path);
+
+       rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK);
+
+       rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0);
+       rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX);
+
+       rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF0x00 = 0x%05x\n",
+                   rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK));
+
+       /* RCK trigger */
+       rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240);
+
+       ret = read_poll_timeout_atomic(rtw89_read_rf, val, val, 2, 30,
+                                      false, rtwdev, path, RR_RCKS, BIT(3));
+
+       rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA);
+
+       rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] rck_val = 0x%x, ret = %d\n",
+                   rck_val, ret);
+
+       rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val);
+       rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5);
+
+       rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF 0x1b = 0x%x\n",
+                   rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK));
+}
+
 static void _drck(struct rtw89_dev *rtwdev)
 {
        u32 rck_d;
@@ -3790,6 +3825,14 @@ void rtw8852bt_dpk_init(struct rtw89_dev *rtwdev)
        _set_dpd_backoff(rtwdev, RTW89_PHY_0);
 }
 
+void rtw8852bt_rck(struct rtw89_dev *rtwdev)
+{
+       u8 path;
+
+       for (path = 0; path < RF_PATH_NUM_8852BT; path++)
+               _rck(rtwdev, path);
+}
+
 void rtw8852bt_dack(struct rtw89_dev *rtwdev)
 {
        u8 phy_map = rtw89_btc_phymap(rtwdev, RTW89_PHY_0, 0);
index 772a5b09937783e50f932e3e2ecd613f887df3d9..09918835c6e85d7a2c059d8abf40abca4ceb6e7c 100644 (file)
@@ -7,6 +7,7 @@
 
 #include "core.h"
 
+void rtw8852bt_rck(struct rtw89_dev *rtwdev);
 void rtw8852bt_dack(struct rtw89_dev *rtwdev);
 void rtw8852bt_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx);
 void rtw8852bt_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx);