]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
net/mlx5: HWS, fix bad parameter in CQ creation
authorYevgeny Kliteynik <kliteyn@nvidia.com>
Sun, 17 Aug 2025 20:23:17 +0000 (23:23 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 28 Aug 2025 14:34:48 +0000 (16:34 +0200)
[ Upstream commit 2462c1b9217246a889ec318b3894d84e4dd709c6 ]

'cqe_sz' valid value should be 0 for 64-byte CQE.

Fixes: 2ca62599aa0b ("net/mlx5: HWS, added send engine and context handling")
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Vlad Dogaru <vdogaru@nvidia.com>
Signed-off-by: Mark Bloch <mbloch@nvidia.com>
Link: https://patch.msgid.link/20250817202323.308604-2-mbloch@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/send.c

index c4b22be19a9b10ebeda2ac0e3deb848d6e82c3a3..b0595c9b09e421996ec65d25e6a3a1b0373d9b57 100644 (file)
@@ -964,7 +964,6 @@ static int hws_send_ring_open_cq(struct mlx5_core_dev *mdev,
                return -ENOMEM;
 
        MLX5_SET(cqc, cqc_data, uar_page, mdev->priv.uar->index);
-       MLX5_SET(cqc, cqc_data, cqe_sz, queue->num_entries);
        MLX5_SET(cqc, cqc_data, log_cq_size, ilog2(queue->num_entries));
 
        err = hws_send_ring_alloc_cq(mdev, numa_node, queue, cqc_data, cq);