ASoC: hdac_hdmi : Ensuring proper setting of output widget power state

In usecases like hot plug-unplug DP panel or modeset during a playback,
sometimes we observe no audio after codec resets. During no audio
condition, we have noticed that the power state of the pin or the
connector is D3. Optimizing the way we set the power mitigates the
issue. With this changes the verb is sent to set the power state and
waits until actual state reaches target state. Thus ensuring power
state is set.

Signed-off-by: Abhijeet Kumar <abhijeet.kumar@intel.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/codecs/hdac_hdmi.c b/sound/soc/codecs/hdac_hdmi.c
index 0758927d1e06dfb39407c93b7f3029627106fe99..60bea9d69fc090d3016a176e0f0191397ff61cf7 100644 (file)
--- a/sound/soc/codecs/hdac_hdmi.c
+++ b/sound/soc/codecs/hdac_hdmi.c
@@ -718,10 +718,22 @@ static struct hdac_hdmi_pcm *hdac_hdmi_get_pcm(struct hdac_ext_device *edev,
 static void hdac_hdmi_set_power_state(struct hdac_ext_device *edev,
                             hda_nid_t nid, unsigned int pwr_state)
 {
+       int count;
+       unsigned int state;
+
        if (get_wcaps(&edev->hdev, nid) & AC_WCAP_POWER) {
-               if (!snd_hdac_check_power_state(&edev->hdev, nid, pwr_state))
-                       snd_hdac_codec_write(&edev->hdev, nid, 0,
-                               AC_VERB_SET_POWER_STATE, pwr_state);
+               if (!snd_hdac_check_power_state(&edev->hdac, nid, pwr_state)) {
+                       for (count = 0; count < 10; count++) {
+                               snd_hdac_codec_read(&edev->hdac, nid, 0,
+                                               AC_VERB_SET_POWER_STATE,
+                                               pwr_state);
+                               state = snd_hdac_sync_power_state(&edev->hdac,
+                                               nid, pwr_state);
+                               if (!(state & AC_PWRST_ERROR))
+                                       break;
+                       }
+               }
+
        }
 }