]> git.ipfire.org Git - people/arne_f/kernel.git/commitdiff
Merge tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm...
authorLinus Torvalds <torvalds@linux-foundation.org>
Mon, 2 Jun 2014 23:34:00 +0000 (16:34 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Mon, 2 Jun 2014 23:34:00 +0000 (16:34 -0700)
Pull ARM SoC devicetree updates from Olof Johansson:
 "As with previous release, this continues to be among the largest
  branches we merge, with lots of new contents.

  New things for this release are among other things:

   - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request)
   - Qualcomm APQ8064 and APQ8084 SoCs and eval boards
   - Nvidia Jetson TK1 development board (Tegra T124-based)

  Two new SoCs that didn't need enough new platform code to stand out
  enough for me to notice when writing the SoC tag, but that adds new DT
  contents are:

   - TI DRA72
   - Marvell Berlin 2Q"

* tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits)
  ARM: dts: add secure firmware support for exynos5420-arndale-octa
  ARM: dts: add pmu sysreg node to exynos3250
  ARM: dts: correct the usb phy node in exynos5800-peach-pi
  ARM: dts: correct the usb phy node in exynos5420-peach-pit
  ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410
  ARM: dts: add dts files for exynos3250 SoC
  ARM: dts: add mfc node for exynos5800
  ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi
  ARM: dts: enable fimd for exynos5800-peach-pi
  ARM: dts: enable display controller for exynos5800-peach-pi
  ARM: dts: enable hdmi for exynos5800-peach-pi
  ARM: dts: add dts file for exynos5800-peach-pi board
  ARM: dts: add dts file for exynos5800 SoC
  ARM: dts: add dts file for exynos5260-xyref5260 board
  ARM: dts: add dts files for exynos5260 SoC
  ARM: dts: update watchdog node name in exynos5440
  ARM: dts: use key code macros on Origen and Arndale boards
  ARM: dts: enable RTC and WDT nodes on Origen boards
  ARM: dts: qcom: Add APQ8084-MTP board support
  ARM: dts: qcom: Add APQ8084 SoC support
  ...

40 files changed:
1  2 
arch/arm/boot/dts/Makefile
arch/arm/boot/dts/am33xx.dtsi
arch/arm/boot/dts/am4372.dtsi
arch/arm/boot/dts/am437x-gp-evm.dts
arch/arm/boot/dts/armada-370-db.dts
arch/arm/boot/dts/armada-375-db.dts
arch/arm/boot/dts/armada-380.dtsi
arch/arm/boot/dts/armada-385.dtsi
arch/arm/boot/dts/armada-xp-db.dts
arch/arm/boot/dts/armada-xp-gp.dts
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
arch/arm/boot/dts/atlas6.dtsi
arch/arm/boot/dts/dra7.dtsi
arch/arm/boot/dts/exynos4412-trats2.dts
arch/arm/boot/dts/exynos5250-arndale.dts
arch/arm/boot/dts/exynos5420.dtsi
arch/arm/boot/dts/imx53-mba53.dts
arch/arm/boot/dts/imx53.dtsi
arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dts
arch/arm/boot/dts/kirkwood-nsa3x0-common.dtsi
arch/arm/boot/dts/omap2420.dtsi
arch/arm/boot/dts/omap2430.dtsi
arch/arm/boot/dts/omap3-n900.dts
arch/arm/boot/dts/omap3.dtsi
arch/arm/boot/dts/omap4.dtsi
arch/arm/boot/dts/omap5.dtsi
arch/arm/boot/dts/prima2.dtsi
arch/arm/boot/dts/r8a7740.dtsi
arch/arm/boot/dts/r8a7790-lager.dts
arch/arm/boot/dts/r8a7790.dtsi
arch/arm/boot/dts/r8a7791-koelsch.dts
arch/arm/boot/dts/r8a7791.dtsi
arch/arm/boot/dts/rk3066a.dtsi
arch/arm/boot/dts/rk3188.dtsi
arch/arm/boot/dts/sun7i-a20.dtsi
arch/arm/boot/dts/zynq-7000.dtsi
arch/arm/mach-omap2/pdata-quirks.c
include/dt-bindings/clock/r8a7790-clock.h
include/dt-bindings/clock/r8a7791-clock.h
include/dt-bindings/pinctrl/omap.h

index 1ae42ed4b9190f9fccc7e6c2f95c229d385a83f4,cbe223c882d9efb71996c15a66641cb97406ac62..5986ff63b90195a4a1782997fcdabc1ffe5418a8
@@@ -317,7 -337,8 +336,8 @@@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += r
        r8a73a4-ape6evm-reference.dtb \
        sh7372-mackerel.dtb
  dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \
 -      r7s72100-genmai-reference.dtb \
 +      r7s72100-genmai.dtb \
+       r8a7791-henninger.dtb \
        r8a7791-koelsch.dtb \
        r8a7790-lager.dtb
  dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
index b939f4f52d16a7c0edb677a86558bacd94fec831,49f9295c7bacdfedd607a28fa75c4e9b2ada595e..8f76d28759a30747d96014bfb8582622d049798b
  
        chosen {
                bootargs = "console=ttyS0,115200n8 earlyprintk";
+               stdout-path = &uart0;
        };
  
 +      mbus {
 +              pcie-controller {
 +                      status = "okay";
 +
 +                      pcie@1,0 {
 +                              status = "okay";
 +                      };
 +              };
 +        };
 +
        ocp@f1000000 {
-               pinctrl@10000 {
+               pin-controller@10000 {
                        pmx_usb_led: pmx-usb-led {
                                marvell,pins = "mpp12";
                                marvell,function = "gpo";
index e2cc85cc3b87e805a113489d3d95cf912d682224,9cb083b72404338f9fb0adc3f81c4ed293079047..2075a2e828f17b6623c71855da85573807fd33f5
@@@ -4,20 -4,10 +4,20 @@@
  / {
        model = "ZyXEL NSA310";
  
 +      mbus {
 +              pcie-controller {
 +                      status = "okay";
 +
 +                      pcie@1,0 {
 +                              status = "okay";
 +                      };
 +              };
 +      };
 +
        ocp@f1000000 {
-               pinctrl: pinctrl@10000 {
+               pinctrl: pin-controller@10000 {
  
-                       pmx_usb_power_off: pmx-usb-power-off {
+                       pmx_usb_power: pmx-usb-power {
                                marvell,pins = "mpp21";
                                marvell,function = "gpio";
                        };
Simple merge
Simple merge
index 150ca097c02d704bd2e2659c77fd10ca20549eb1,a289910ec362cc54fe43c2fa041530a9648af09e..059a8ff1e6ac93374bb9a4e014a661c3809d36ce
                >;
        };
  
 +      debug_leds: pinmux_debug_led_pins {
 +              pinctrl-single,pins = <
 +                      OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* mcbsp1_clkx.gpio_162 */
 +              >;
 +      };
 +
+       mcspi4_pins: pinmux_mcspi4_pins {
+               pinctrl-single,pins = <
+                       0x15c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
+                       0x162 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
+                       0x160 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
+                       0x166 (PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
+               >;
+       };
        mmc1_pins: pinmux_mmc1_pins {
                pinctrl-single,pins = <
                        0x114 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_clk */
Simple merge
Simple merge
Simple merge
Simple merge
Simple merge
index f5e548735d7a84919c85fef8d9321b28e07a8e10,86d676f629429ab3c304111fcdd987e91fca0c9a..dd2fe46073f2298ba68431625697e669c1ee5ddb
        };
  };
  
 -
 +&scif0 {
 +      pinctrl-0 = <&scif0_pins>;
 +      pinctrl-names = "default";
 +
 +      status = "okay";
 +};
 +
 +&scif1 {
 +      pinctrl-0 = <&scif1_pins>;
 +      pinctrl-names = "default";
 +
 +      status = "okay";
 +};
 +
+ &msiof1 {
+       pinctrl-0 = <&msiof1_pins>;
+       pinctrl-names = "default";
+       status = "okay";
+       pmic: pmic@0 {
+               compatible = "renesas,r2a11302ft";
+               reg = <0>;
+               spi-max-frequency = <6000000>;
+               spi-cpol;
+               spi-cpha;
+       };
+ };
  &sdhi0 {
        pinctrl-0 = <&sdhi0_pins>;
        pinctrl-names = "default";
Simple merge
index 277385dfe99ad7eae59d8c0572944418fb3180dc,0d69813def859eb1d235576acc565e9269a8e5d6..05d44f9b202f5d5199c2f576298c76cd8774dfde
        };
  };
  
+ &i2c6 {
+       status = "okay";
+       clock-frequency = <100000>;
+ };
  &pfc {
 -      pinctrl-0 = <&du_pins &scif0_pins &scif1_pins>;
 +      pinctrl-0 = <&du_pins>;
        pinctrl-names = "default";
  
-       i2c2_pins: i2c {
+       i2c2_pins: i2c2 {
                renesas,groups = "i2c2";
                renesas,function = "i2c2";
        };
Simple merge
Simple merge
Simple merge
index aba1c8a3f3883320a50b31dcac05341568e0a335,56df970ffe25337f0090a9f43aad7d501c9be700..385933bac1140826ea827b0fdbe707d37521e029
                        clocks = <&apb1_gates 3>;
                        clock-frequency = <100000>;
                        status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
                };
  
 -              i2c4: i2c@01c2bc00 {
 +              i2c4: i2c@01c2c000 {
                        compatible = "allwinner,sun4i-i2c";
 -                      reg = <0x01c2bc00 0x400>;
 +                      reg = <0x01c2c000 0x400>;
                        interrupts = <0 89 4>;
                        clocks = <&apb1_gates 15>;
                        clock-frequency = <100000>;
Simple merge
Simple merge
index 404ba7ef78131fc6665f60a3d96a13c970ad3a93,827e80964a35484d2efd8d7e0f6e68610cde8af7..1c75b8ca5228a9a47c5d00c81df1b28c0a524f60
  #define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
  #define OMAP3_WKUP_IOPAD(pa, val)     OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
  #define AM33XX_IOPAD(pa, val)         OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
- #define OMAP4_CORE_IOPAD(pa, val)     OMAP_IOPAD_OFFSET((pa), 0x0040) (val)
- #define OMAP4_WKUP_IOPAD(pa, val)     OMAP_IOPAD_OFFSET((pa), 0xe040) (val)
  #define AM4372_IOPAD(pa, val)         OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
- #define OMAP5_CORE_IOPAD(pa, val)     OMAP_IOPAD_OFFSET((pa), 0x2840) (val)
- #define OMAP5_WKUP_IOPAD(pa, val)     OMAP_IOPAD_OFFSET((pa), 0xc840) (val)
  #define DRA7XX_CORE_IOPAD(pa, val)    OMAP_IOPAD_OFFSET((pa), 0x3400) (val)
  
+ /*
+  * Macros to allow using the offset from the padconf physical address
+  * instead  of the offset from padconf base.
+  */
+ #define OMAP_PADCONF_OFFSET(offset, base_offset)      ((offset) - (base_offset))
+ #define OMAP4_IOPAD(offset, val)      OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
+ #define OMAP5_IOPAD(offset, val)      OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
 +/*
 + * Define some commonly used pins configured by the boards.
 + * Note that some boards use alternative pins, so check
 + * the schematics before using these.
 + */
 +#define OMAP3_UART1_RX                0x152
 +#define OMAP3_UART2_RX                0x14a
 +#define OMAP3_UART3_RX                0x16e
 +#define OMAP4_UART2_RX                0xdc
 +#define OMAP4_UART3_RX                0x104
 +#define OMAP4_UART4_RX                0x11c
 +
  #endif