Fixes for 5.15

Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/queue-5.15/regmap-spi-avmm-fix-regmap_bus-max_raw_write.patch b/queue-5.15/regmap-spi-avmm-fix-regmap_bus-max_raw_write.patch
new file mode 100644 (file)
index 0000000..80762e2
--- /dev/null
+++ b/queue-5.15/regmap-spi-avmm-fix-regmap_bus-max_raw_write.patch
@@ -0,0 +1,52 @@
+From 9a104dd976b827671bac07479f84f233ccbdf96d Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Tue, 20 Jun 2023 13:28:24 -0700
+Subject: regmap: spi-avmm: Fix regmap_bus max_raw_write
+
+From: Russ Weight <russell.h.weight@intel.com>
+
+[ Upstream commit c8e796895e2310b6130e7577248da1d771431a77 ]
+
+The max_raw_write member of the regmap_spi_avmm_bus structure is defined
+as:
+       .max_raw_write = SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT
+
+SPI_AVMM_VAL_SIZE == 4 and MAX_WRITE_CNT == 1 so this results in a
+maximum write transfer size of 4 bytes which provides only enough space to
+transfer the address of the target register. It provides no space for the
+value to be transferred. This bug became an issue (divide-by-zero in
+_regmap_raw_write()) after the following was accepted into mainline:
+
+commit 3981514180c9 ("regmap: Account for register length when chunking")
+
+Change max_raw_write to include space (4 additional bytes) for both the
+register address and value:
+
+       .max_raw_write = SPI_AVMM_REG_SIZE + SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT
+
+Fixes: 7f9fb67358a2 ("regmap: add Intel SPI Slave to AVMM Bus Bridge support")
+Reviewed-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
+Signed-off-by: Russ Weight <russell.h.weight@intel.com>
+Link: https://lore.kernel.org/r/20230620202824.380313-1-russell.h.weight@intel.com
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ drivers/base/regmap/regmap-spi-avmm.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/base/regmap/regmap-spi-avmm.c b/drivers/base/regmap/regmap-spi-avmm.c
+index ad1da83e849fe..67f89937219c3 100644
+--- a/drivers/base/regmap/regmap-spi-avmm.c
++++ b/drivers/base/regmap/regmap-spi-avmm.c
+@@ -666,7 +666,7 @@ static const struct regmap_bus regmap_spi_avmm_bus = {
+       .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
+       .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
+       .max_raw_read = SPI_AVMM_VAL_SIZE * MAX_READ_CNT,
+-      .max_raw_write = SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT,
++      .max_raw_write = SPI_AVMM_REG_SIZE + SPI_AVMM_VAL_SIZE * MAX_WRITE_CNT,
+       .free_context = spi_avmm_bridge_ctx_free,
+ };
+ 
+-- 
+2.39.2
+

diff --git a/queue-5.15/regulator-pca9450-fix-ldo3out-and-ldo4out-mask.patch b/queue-5.15/regulator-pca9450-fix-ldo3out-and-ldo4out-mask.patch
new file mode 100644 (file)
index 0000000..0904bc6
--- /dev/null
+++ b/queue-5.15/regulator-pca9450-fix-ldo3out-and-ldo4out-mask.patch
@@ -0,0 +1,43 @@
+From a06ba8796ebf3af246c5fe197399d08d58cd187e Mon Sep 17 00:00:00 2001
+From: Sasha Levin <sashal@kernel.org>
+Date: Wed, 14 Jun 2023 14:52:40 +0200
+Subject: regulator: pca9450: Fix LDO3OUT and LDO4OUT MASK
+
+From: Teresa Remmet <t.remmet@phytec.de>
+
+[ Upstream commit 7257d930aadcd62d1c7971ab14f3b1126356abdc ]
+
+L3_OUT and L4_OUT Bit fields range from Bit 0:4 and thus the
+mask should be 0x1F instead of 0x0F.
+
+Fixes: 0935ff5f1f0a ("regulator: pca9450: add pca9450 pmic driver")
+Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
+Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
+Link: https://lore.kernel.org/r/20230614125240.3946519-1-t.remmet@phytec.de
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Sasha Levin <sashal@kernel.org>
+---
+ include/linux/regulator/pca9450.h | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/include/linux/regulator/pca9450.h b/include/linux/regulator/pca9450.h
+index 71902f41c9199..0c3edff6bdfff 100644
+--- a/include/linux/regulator/pca9450.h
++++ b/include/linux/regulator/pca9450.h
+@@ -196,11 +196,11 @@ enum {
+ 
+ /* PCA9450_REG_LDO3_VOLT bits */
+ #define LDO3_EN_MASK                  0xC0
+-#define LDO3OUT_MASK                  0x0F
++#define LDO3OUT_MASK                  0x1F
+ 
+ /* PCA9450_REG_LDO4_VOLT bits */
+ #define LDO4_EN_MASK                  0xC0
+-#define LDO4OUT_MASK                  0x0F
++#define LDO4OUT_MASK                  0x1F
+ 
+ /* PCA9450_REG_LDO5_VOLT bits */
+ #define LDO5L_EN_MASK                 0xC0
+-- 
+2.39.2
+

diff --git a/queue-5.15/series b/queue-5.15/series
index ca36d5fad7130b2e225c516d6fd01dbde224b179..4af3046ed298e7023270215ecbf5ed7d048cc7e8 100644 (file)
--- a/queue-5.15/series
+++ b/queue-5.15/series
@@ -26,3 +26,5 @@ mmc-sdhci-msm-disable-broken-64-bit-dma-on-msm8916.patch
 mmc-meson-gx-remove-redundant-mmc_request_done-call-from-irq-context.patch
 mmc-mmci-stm32-fix-max-busy-timeout-calculation.patch
 ip_tunnels-allow-vxlan-geneve-to-inherit-tos-ttl-from-vlan.patch
+regulator-pca9450-fix-ldo3out-and-ldo4out-mask.patch
+regmap-spi-avmm-fix-regmap_bus-max_raw_write.patch