/* --------- The amd64 assembler (bleh.) --------- */
/* Produce the low three bits of an integer register number. */
-static UChar iregNo ( HReg r )
+static UChar iregBits210 ( HReg r )
{
UInt n;
vassert(hregClass(r) == HRcInt64);
return toUChar((n >> 3) & 1);
}
+/* Produce a complete 4-bit integer register number. */
+static UChar iregBits3210 ( HReg r )
+{
+ UInt n;
+ vassert(hregClass(r) == HRcInt64);
+ vassert(!hregIsVirtual(r));
+ n = hregNumber(r);
+ vassert(n <= 15);
+ return toUChar(n);
+}
+
+
//.. static UInt fregNo ( HReg r )
//.. {
&& am->Aam.IR.reg != hregAMD64_R12()
&& am->Aam.IR.reg != hregAMD64_R13()
) {
- *p++ = mkModRegRM(0, iregNo(greg), iregNo(am->Aam.IR.reg));
+ *p++ = mkModRegRM(0, iregBits210(greg),
+ iregBits210(am->Aam.IR.reg));
return p;
}
if (fits8bits(am->Aam.IR.imm)
&& am->Aam.IR.reg != hregAMD64_RSP()
&& am->Aam.IR.reg != hregAMD64_R12()
) {
- *p++ = mkModRegRM(1, iregNo(greg), iregNo(am->Aam.IR.reg));
+ *p++ = mkModRegRM(1, iregBits210(greg),
+ iregBits210(am->Aam.IR.reg));
*p++ = toUChar(am->Aam.IR.imm & 0xFF);
return p;
}
if (am->Aam.IR.reg != hregAMD64_RSP()
&& am->Aam.IR.reg != hregAMD64_R12()
) {
- *p++ = mkModRegRM(2, iregNo(greg), iregNo(am->Aam.IR.reg));
+ *p++ = mkModRegRM(2, iregBits210(greg),
+ iregBits210(am->Aam.IR.reg));
p = emit32(p, am->Aam.IR.imm);
return p;
}
if ((am->Aam.IR.reg == hregAMD64_RSP()
|| am->Aam.IR.reg == hregAMD64_R12())
&& fits8bits(am->Aam.IR.imm)) {
- *p++ = mkModRegRM(1, iregNo(greg), 4);
+ *p++ = mkModRegRM(1, iregBits210(greg), 4);
*p++ = 0x24;
*p++ = toUChar(am->Aam.IR.imm & 0xFF);
return p;
if (/* (am->Aam.IR.reg == hregAMD64_RSP()
|| wait for test case for RSP case */
am->Aam.IR.reg == hregAMD64_R12()) {
- *p++ = mkModRegRM(2, iregNo(greg), 4);
+ *p++ = mkModRegRM(2, iregBits210(greg), 4);
*p++ = 0x24;
p = emit32(p, am->Aam.IR.imm);
return p;
if (am->tag == Aam_IRRS) {
if (fits8bits(am->Aam.IRRS.imm)
&& am->Aam.IRRS.index != hregAMD64_RSP()) {
- *p++ = mkModRegRM(1, iregNo(greg), 4);
+ *p++ = mkModRegRM(1, iregBits210(greg), 4);
*p++ = mkSIB(am->Aam.IRRS.shift, am->Aam.IRRS.index,
am->Aam.IRRS.base);
*p++ = toUChar(am->Aam.IRRS.imm & 0xFF);
return p;
}
if (am->Aam.IRRS.index != hregAMD64_RSP()) {
- *p++ = mkModRegRM(2, iregNo(greg), 4);
+ *p++ = mkModRegRM(2, iregBits210(greg), 4);
*p++ = mkSIB(am->Aam.IRRS.shift, am->Aam.IRRS.index,
am->Aam.IRRS.base);
p = emit32(p, am->Aam.IRRS.imm);
/* Emit a mod-reg-rm byte when the rm bit denotes a reg. */
static UChar* doAMode_R ( UChar* p, HReg greg, HReg ereg )
{
- *p++ = mkModRegRM(3, iregNo(greg), iregNo(ereg));
+ *p++ = mkModRegRM(3, iregBits210(greg), iregBits210(ereg));
return p;
}
case Ain_Imm64:
*p++ = toUChar(0x48 + (1 & iregBit3(i->Ain.Imm64.dst)));
- *p++ = toUChar(0xB8 + iregNo(i->Ain.Imm64.dst));
+ *p++ = toUChar(0xB8 + iregBits210(i->Ain.Imm64.dst));
p = emit64(p, i->Ain.Imm64.imm64);
goto done;
case Armi_Imm:
*p++ = toUChar(0x48 + (1 & iregBit3(i->Ain.Alu64R.dst)));
*p++ = 0xC7;
- *p++ = toUChar(0xC0 + iregNo(i->Ain.Alu64R.dst));
+ *p++ = toUChar(0xC0 + iregBits210(i->Ain.Alu64R.dst));
p = emit32(p, i->Ain.Alu64R.src->Armi.Imm.imm32);
goto done;
case Armi_Reg:
goto done;
case Armi_Reg:
*p++ = toUChar(0x40 + (1 & iregBit3(i->Ain.Push.src->Armi.Reg.reg)));
- *p++ = toUChar(0x50 + iregNo(i->Ain.Push.src->Armi.Reg.reg));
+ *p++ = toUChar(0x50 + iregBits210(i->Ain.Push.src->Armi.Reg.reg));
goto done;
default:
goto bad;
of the destination should be forced to zero, but doing 'xorq
%r,%r' kills the flag(s) we are about to read. Sigh. So
start off my moving $0 into the dest. */
-
- reg = iregNo(i->Ain.Set64.dst);
+ reg = iregBits3210(i->Ain.Set64.dst);
vassert(reg < 16);
/* movq $0, %dst */
*p++ = 0x9C;
/* popq %dst */
*p++ = toUChar(0x40 + (1 & iregBit3(i->Ain.SseUComIS.dst)));
- *p++ = toUChar(0x58 + iregNo(i->Ain.SseUComIS.dst));
+ *p++ = toUChar(0x58 + iregBits210(i->Ain.SseUComIS.dst));
goto done;
case Ain_SseSI2SF: