Update nvptx's bitrev<mode>2 pattern to use BITREVERSE rtx.

This minor tweak to the nvptx backend switches the representation of
of the brev instruction from an UNSPEC to instead use the new BITREVERSE
rtx.  This allows various RTL optimizations including evaluation (constant
folding) of integer constant arguments at compile-time.

	gcc/
	* config/nvptx/nvptx.md (UNSPEC_BITREV): Delete.
	(bitrev<mode>2): Represent using bitreverse.
	gcc/testsuite/
	* gcc.target/nvptx/brev-2-O2.c: Adjust.
	* gcc.target/nvptx/brevll-2-O2.c: Likewise.

Co-authored-by: Thomas Schwinge <thomas@codesourcery.com>

diff --git a/gcc/config/nvptx/nvptx.md b/gcc/config/nvptx/nvptx.md
index 1bb930454031bf4a3c35142fc1a9ece104be3bb8..7a7c9948f45ee6dfcfe8fe7d0dbfede2feaf6eb7 100644 (file)
--- a/gcc/config/nvptx/nvptx.md
+++ b/gcc/config/nvptx/nvptx.md
@@ -34,8 +34,6 @@
    UNSPEC_FPINT_CEIL
    UNSPEC_FPINT_NEARBYINT
 
-   UNSPEC_BITREV
-
    UNSPEC_ALLOCA
 
    UNSPEC_SET_SOFTSTACK
@@ -636,8 +634,7 @@
 
 (define_insn "bitrev<mode>2"
   [(set (match_operand:SDIM 0 "nvptx_register_operand" "=R")
-       (unspec:SDIM [(match_operand:SDIM 1 "nvptx_register_operand" "R")]
-                    UNSPEC_BITREV))]
+       (bitreverse:SDIM (match_operand:SDIM 1 "nvptx_register_operand" "R")))]
   ""
   "%.\\tbrev.b%T0\\t%0, %1;")
 

diff --git a/gcc/testsuite/gcc.target/nvptx/brev-2-O2.c b/gcc/testsuite/gcc.target/nvptx/brev-2-O2.c
index e35052208d0b22f8f74835160cf6fae2cbe1a7cc..c707a87f35665f411d8d9c8e7a0458be65bd5911 100644 (file)
--- a/gcc/testsuite/gcc.target/nvptx/brev-2-O2.c
+++ b/gcc/testsuite/gcc.target/nvptx/brev-2-O2.c
@@ -1,7 +1,6 @@
 /* { dg-do run } */
 /* { dg-options "-O2" } */
 /* { dg-additional-options -save-temps } */
-/* { dg-final { check-function-bodies {**} {} } } */
 
 inline __attribute__((always_inline))
 unsigned int bitreverse32(unsigned int x)
@@ -96,26 +95,6 @@ int main(void)
 
   return 0;
 }
-/*
-** main:
-**     ...
-**     mov\.u32        (%r[0-9]+), 0;
-**     brev\.b32       (%r[0-9]+), \1;
-**     setp\.[^.]+\.u32        %r[0-9]+, \2, 0;
-**     ...
-**     mov\.u32        (%r[0-9]+), -1;
-**     brev\.b32       (%r[0-9]+), \3;
-**     setp\.[^.]+\.u32        %r[0-9]+, \4, -1;
-**     ...
-**     mov\.u32        (%r[0-9]+), 1;
-**     brev\.b32       (%r[0-9]+), \5;
-**     setp\.[^.]+\.u32        %r[0-9]+, \6, -2147483648;
-**     ...
-**     mov\.u32        (%r[0-9]+), 2;
-**     brev\.b32       (%r[0-9]+), \7;
-**     setp\.[^.]+\.u32        %r[0-9]+, \8, 1073741824;
-**     ...
-*/
 
-/* { dg-final { scan-assembler-times {\tbrev\.b32\t} 40 } } */
-/* { dg-final { scan-assembler {\mabort\M} } } */
+/* { dg-final { scan-assembler-not {\tbrev\.b32\t} } } */
+/* { dg-final { scan-assembler-not {\mabort\M} } } */

diff --git a/gcc/testsuite/gcc.target/nvptx/brevll-2-O2.c b/gcc/testsuite/gcc.target/nvptx/brevll-2-O2.c
index cbfda1b9601d47a5942ac956aa51a9a543d74fca..c89be9627f85894c2a60ba152533b7ccbb44fcd5 100644 (file)
--- a/gcc/testsuite/gcc.target/nvptx/brevll-2-O2.c
+++ b/gcc/testsuite/gcc.target/nvptx/brevll-2-O2.c
@@ -1,7 +1,6 @@
 /* { dg-do run } */
 /* { dg-options "-O2" } */
 /* { dg-additional-options -save-temps } */
-/* { dg-final { check-function-bodies {**} {} } } */
 
 inline __attribute__((always_inline))
 unsigned long long bitreverse64(unsigned long long x)
@@ -156,26 +155,6 @@ int main(void)
 
   return 0;
 }
-/*
-** main:
-**     ...
-**     mov\.u64        (%r[0-9]+), 0;
-**     brev\.b64       (%r[0-9]+), \1;
-**     setp\.[^.]+\.u64        %r[0-9]+, \2, 0;
-**     ...
-**     mov\.u64        (%r[0-9]+), -1;
-**     brev\.b64       (%r[0-9]+), \3;
-**     setp\.[^.]+\.u64        %r[0-9]+, \4, -1;
-**     ...
-**     mov\.u64        (%r[0-9]+), 1;
-**     brev\.b64       (%r[0-9]+), \5;
-**     setp\.[^.]+\.u64        %r[0-9]+, \6, -9223372036854775808;
-**     ...
-**     mov\.u64        (%r[0-9]+), 2;
-**     brev\.b64       (%r[0-9]+), \7;
-**     setp\.[^.]+\.u64        %r[0-9]+, \8, 4611686018427387904;
-**     ...
-*/
 
-/* { dg-final { scan-assembler-times {\tbrev\.b64\t} 70 } } */
-/* { dg-final { scan-assembler {\mabort\M} } } */
+/* { dg-final { scan-assembler-not {\tbrev\.b64\t} } } */
+/* { dg-final { scan-assembler-not {\mabort\M} } } */