RISC-V: Refine signed vector SAT_TRUNC testcase dump check to tree optimized

The sat alu related testcase check the rtl dump for the standard name
like .SAT_TRUNC exist or not.  But the rtl pass expand is somehow
impressionable by the middle-end change or debug information.  Like
below new appearance recently.

Replacing Expressions
_5 replace with --> _5 = .SAT_TRUNC (x_3(D), y_4(D)); [tail call]

After that we need to adjust the dump check time and again.  This
patch would like to switch to tree optimized pass for the standard
name check, which is more stable up to a point.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c: Take
	tree-optimized pass for standard name check, and adjust the times.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c: Ditto.
	* gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c
index 51a3b1d065e38f328d6ef0df8d8f1f2aa9341fcb..53f84b49dff0e02fa59fab0df70b404a4afb3b16 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_1(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c
index 95a11e96a66d5a2f298bec775a74419f4babb9eb..aea91799712eb47135f071a5d741861d92144302 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c
@@ -1,9 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_1(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c
index 1f40a2e8fc7b3bd0a30a2f350e73d461f57894ed..2b464e14e269c3a1e62037a8b10d3ea646fe733e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_1(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_SUB " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c
index 4a5bdfc1fd4a55dd34e491136a805b8af587452a..7c52fe00bd753a641f89da9cad607b7158edad9c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c
@@ -1,9 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_1(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c
index 034bff3b34f3f16422c0174e87b5d1ace3d16eae..7ab441b30507de2a0f9aee8285afb77a29882feb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c
@@ -1,9 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_1(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c
index f437c54508c01f30e35b51318524159af7b76749..5dd207852ab1c1d5be721ccab8c6cafa462793ef 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_1(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_SUB " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_SUB " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 3 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c
index 1a0e2d58dbacca05f257748725e33114202ce809..a6b755fc05929190e6f60e60617f049039a0a328 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_2(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c
index 88bc1f77cc547e58b7b130749759751956056bda..0eaf12a46d948cde7ab1d14a4da14dde3e808ace 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_2(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c
index d56dd050ab26b1f815610409d35e66fac3ccb39b..62476968a6571157bc94e927766230941b066ee6 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_2(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c
index db23955415f3314d90edf6cdcad66e7640091966..87ac9a4dbec44581bc746f677f4e7cc6d30db394 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_2(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c
index f9c30fadb48f70857b6dfafa65f5169b6c41a83b..d198aa185699947a814ef14b77bd4a8ae823ebbd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_2(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c
index a1b21ab805ede3501321d1b570c394d3e7411d32..9e1d9919d3bee7d01696c0ebfb47403c669661d2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_2(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 3 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c
index 933043717608989712c13dc5c548d206be3122c7..9713893ccf89350a0d23f4068f7c8037e14004ca 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_3(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c
index c17b25fd68b1f465bc38cb04f15a5d8dc45cfebb..cfaf32b3c607ee5cafc9acf8c9bbf95fb3660687 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_3(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c
index 1adc420078cc48c943859209766edf88426396fd..aa7c278fe80a784d41f11f130e18598938672c31 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_3(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c
index b215b4dbd63144becd9cb9af28f095f9612a9525..60cfc282d5122dd64adf1282486df398f69a40e8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_3(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c
index 13e68df011ab2345b4ceff16f0f2632830ef0126..be60547910233bc262798b2ef0b65e2ddc8972d8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_3(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c
index 7bd230393e586d2fab7cb13745f78c5d4ff8e40e..22fe85ecb87d5253bcc446caa3e4acdf86aabf5f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_3(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 3 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c
index 9b85ac5250fa954f5a1cfd370e69e54a126bd473..f1392d27256ef079807cc12ddf3393f26398320b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_4(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c
index 912e2b73526aba836327882b572bb4a67549f085..f132ec67ae88bf890db833b7e51a7751b61135f2 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_4(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c
index f831f79b05f955f45e9f2922252db9ea450e287c..2bdce5793c3ef7722821df490eb4d2362b54a214 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_4(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c
index f67afcd4e0985e90d5af1781d96e283812ca67bb..cfe150faddb67c087a53048bd2e15c18f77eaae1 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_4(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c
index d0bf273df336f2e2280aa4d7295f2203c026d1fc..a8db981e9044d9667d82c2e2a8f76fbf45e0fb44 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_4(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c
index d7ea8582184aab3b500c1d875057f665f508d19b..f9a2e103183a5c74cbfa249c1c5ed2c9324a2645 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_4(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 3 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c
index c62175ecbf750da176bdde794aa674caca03be7e..cedb8d4662d6fb77f2df07c0f32bab0011fef7d3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_5(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c
index 0e5fe79d963059eaec35a91df0d02e59d8a0d0dd..0b72b19eb19251d4856dd8d08f3778e7090be8a9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_5(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c
index 90f1a3a2f6ce7dd34ba3689c6849624c5b3a8887..cee4f162f8828268a6b8f53e4454c3e59925cdcd 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_5(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c
index 69f397a90a7d8925f94f10dab29d12c78d4f98dd..6522129df2d9c35a04fad8df02fd8a59d5840cdc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_5(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c
index 53a8f86f0f30901eb5f27ef0928c1ab4c735ec1c..bd4d74841ff1c019ff2e6ecf7a04c7b56cdc95e8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_5(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c
index af49f56d1929418ca53b7d546afc41e59b08d7a1..a1e8ec94bee71d1d5bb9b729114ae7f611a75cfc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_5(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 3 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c
index f2790d8ead08814d8546ab21ba74048fa5e43d44..62a5b6a65a66e6c78d26df409fc1f755535b4ad9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_6(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c
index c68eaf7b45ff76b41e62f02dfcabf3a79a008767..972a69ea404003c36f84b8fb549473abd0014168 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_6(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c
index 7f81ee119cf85596db7237519e6e212892773744..89f18e05f0a208d9963dd715118bf9287964051a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_6(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c
index f7da852782456276fbb35d861027ebc56b992325..40bec6bfc9bc680472990cc86306edfb865d3ab9 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_6(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c
index b3d3d07cc142b99f9120ce8af44b6678c6c80ebf..1b378d9a982f91fa5cce06a37aa10ce6356f8c48 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_6(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c
index c16337cdc682ea77ce443dfe973fb6606195ab1f..22452992f900c8f4e530532e90ff099080a04fb8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_6(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 3 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c
index 171efe722a3200eb140b583d9a9d3ed5d8a39014..be8a470b5779b0d325701a0c2de8c0dc0ba67213 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_7(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c
index 9d0e1fdd82d77015a4713e8653553b2cd610c008..9526ca1c89c4e8120f593b0001091b7d4b91d07b 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_7(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c
index 8175a70239c57304bb0bdbec27f50d64ae69c9d6..de1c6bd5e886efdf1eae93ba7d381afdffe131d0 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_7(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c
index 2f6a1ea60ee3cfd4b2d60697431d660a59de96b7..33576664602b83224e2b4cfbe80ac8d8c891ef28 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_7(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c
index 3862e85b513a9aecd5ac89a8d4e8029d6a164807..5469621276d227f32b131142c985b5d74743952a 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_7(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c
index dcde698db485b07cdfa3314b91af1b59b84df7e6..86698a86a3ea2b953123a396e8a6084a4a494268 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_7(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 3 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c
index 4fc64a281c4804e359d48bde4d4e89053fade352..f38ebdfee2909f741b15951019309c4363ad84dc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_8(int8_t, int16_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c
index c80621a104791a970ffd326788e3bbd03037a721..5838b7cd44ba299848b29e10f9b98db09a20fe34 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_8(int16_t, int32_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c
index a60ff87c8a7a91f4cfc1a61992d5ce5c698cccf7..f266f5452ef11f30640f64827ec313ccdb6751d3 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_8(int8_t, int32_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c
index 1257dc6427e69918e642b98b80eaa73f3a1a3acc..2f42b1eb2241145739e772a8ffbf8149c071bfea 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_8(int16_t, int64_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 2 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c
index 9a1fe30bc51b243950b08ae1ac0a11766e126df8..741f6bcab5d49237c73229fb07fb5e0881701b93 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_8(int32_t, int64_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 1 } } */

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c
index 7d6a8e26703d0095bbfc3341f3a7e8ef6f5a4a9f..5c7b53c9ad68859ced785893ca07c6ce26cce075 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c
@@ -1,14 +1,14 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gcv -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "vec_sat_arith.h"
 
 DEF_VEC_SAT_S_TRUNC_FMT_8(int8_t, int64_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 2 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" { target { any-opts
      "-O3"
    } } } } */
-/* { dg-final { scan-rtl-dump-times ".SAT_TRUNC " 4 "expand" { target { any-opts
+/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 2 "optimized" { target { any-opts
      "-O2"
    } } } } */
 /* { dg-final { scan-assembler-times {vnclip\.wi} 3 } } */