]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
* config/nvptx/nvptx.md (sel_true<mode>, sel_false<mode>): New
authornathan <nathan@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 23 Jun 2015 13:05:15 +0000 (13:05 +0000)
committernathan <nathan@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 23 Jun 2015 13:05:15 +0000 (13:05 +0000)
conditional selects.
(setcc_int<mode>, setcc_float<mode>): Reformat.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@224839 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/nvptx/nvptx.md

index 80c07c82efd0f7deeb6928bf32e3c6740c896fa1..f7d60f5306070aeafac37a014ce677e8717619cb 100644 (file)
@@ -1,3 +1,9 @@
+2015-06-23  Nathan Sidwell  <nathan@codesourcery.com>
+
+       * config/nvptx/nvptx.md (sel_true<mode>, sel_false<mode>): New
+       conditional selects.
+       (setcc_int<mode>, setcc_float<mode>): Reformat.
+
 2015-06-23  Marek Polacek  <polacek@redhat.com>
 
        * match.pd ((x + y) - (x | y) -> x & y,
index a49786cb00bde39b4896ee12fa674f084d60b6cd..a4df53b91e7e232f64bad23294e1e6e93c8c89b7 100644 (file)
   ""
   "%.\\tselp%t0 %0,-1,0,%1;")
 
+(define_insn "sel_true<mode>"
+  [(set (match_operand:HSDIM 0 "nvptx_register_operand" "=R")
+        (if_then_else:HSDIM
+         (ne (match_operand:BI 1 "nvptx_register_operand" "R") (const_int 0))
+         (match_operand:HSDIM 2 "nvptx_nonmemory_operand" "Ri")
+         (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")))]
+  ""
+  "%.\\tselp%t0\\t%0, %2, %3, %1;")
+
+(define_insn "sel_true<mode>"
+  [(set (match_operand:SDFM 0 "nvptx_register_operand" "=R")
+        (if_then_else:SDFM
+         (ne (match_operand:BI 1 "nvptx_register_operand" "R") (const_int 0))
+         (match_operand:SDFM 2 "nvptx_nonmemory_operand" "RF")
+         (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")))]
+  ""
+  "%.\\tselp%t0\\t%0, %2, %3, %1;")
+
+(define_insn "sel_false<mode>"
+  [(set (match_operand:HSDIM 0 "nvptx_register_operand" "=R")
+        (if_then_else:HSDIM
+         (eq (match_operand:BI 1 "nvptx_register_operand" "R") (const_int 0))
+         (match_operand:HSDIM 2 "nvptx_nonmemory_operand" "Ri")
+         (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")))]
+  ""
+  "%.\\tselp%t0\\t%0, %3, %2, %1;")
+
+(define_insn "sel_false<mode>"
+  [(set (match_operand:SDFM 0 "nvptx_register_operand" "=R")
+        (if_then_else:SDFM
+         (eq (match_operand:BI 1 "nvptx_register_operand" "R") (const_int 0))
+         (match_operand:SDFM 2 "nvptx_nonmemory_operand" "RF")
+         (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")))]
+  ""
+  "%.\\tselp%t0\\t%0, %3, %2, %1;")
+
 (define_insn "setcc_int<mode>"
   [(set (match_operand:SI 0 "nvptx_register_operand" "=R")
        (match_operator:SI 1 "nvptx_comparison_operator"
-                          [(match_operand:HSDIM 2 "nvptx_register_operand" "R")
-                           (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")]))]
+         [(match_operand:HSDIM 2 "nvptx_register_operand" "R")
+          (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")]))]
   ""
   "%.\\tset%t0%c1 %0,%2,%3;")
 
 (define_insn "setcc_int<mode>"
   [(set (match_operand:SI 0 "nvptx_register_operand" "=R")
        (match_operator:SI 1 "nvptx_float_comparison_operator"
-                          [(match_operand:SDFM 2 "nvptx_register_operand" "R")
-                           (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")]))]
+          [(match_operand:SDFM 2 "nvptx_register_operand" "R")
+           (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")]))]
   ""
   "%.\\tset%t0%c1 %0,%2,%3;")
 
 (define_insn "setcc_float<mode>"
   [(set (match_operand:SF 0 "nvptx_register_operand" "=R")
        (match_operator:SF 1 "nvptx_comparison_operator"
-                          [(match_operand:HSDIM 2 "nvptx_register_operand" "R")
-                           (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")]))]
+          [(match_operand:HSDIM 2 "nvptx_register_operand" "R")
+           (match_operand:HSDIM 3 "nvptx_nonmemory_operand" "Ri")]))]
   ""
   "%.\\tset%t0%c1 %0,%2,%3;")
 
 (define_insn "setcc_float<mode>"
   [(set (match_operand:SF 0 "nvptx_register_operand" "=R")
        (match_operator:SF 1 "nvptx_float_comparison_operator"
-                          [(match_operand:SDFM 2 "nvptx_register_operand" "R")
-                           (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")]))]
+          [(match_operand:SDFM 2 "nvptx_register_operand" "R")
+           (match_operand:SDFM 3 "nvptx_nonmemory_operand" "RF")]))]
   ""
   "%.\\tset%t0%c1 %0,%2,%3;")