power10 on ppc32

We don't support power10 on ppc32, mainly because some instructions
have 34-bit fields for which we don't have relocations on ppc32.
If you try to assemble typical code, you'll see errors saying
"reloc ... not supported by object file format".  Also, on 32-bit
hosts with binutils configured without a 64-bit bfd, you'll see errors
saying "bignum invalid" when using large offsets.  But let's not kill
output of prefix insns entirely on 32-bit hosts.

	* config/tc-ppc.c (md_assemble): Emit prefix insn by parts when
	valueT is smaller than 64 bits.

(cherry picked from commit 15a32af52fdc010801396cbcf62f33d88435ac1a)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 92ce9595d32a56711d8469fd39b0e980e84657a1..91104ea4a07cc81eb0996ad3b4a0df7a9f83e87a 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,10 @@
+2021-01-28  Alan Modra  <amodra@gmail.com>
+
+       Apply from master
+       2020-09-09  Alan Modra  <amodra@gmail.com>
+       * config/tc-ppc.c (md_assemble): Emit prefix insn by parts when
+       valueT is smaller than 64 bits.
+
 2021-01-25  Alan Modra  <amodra@gmail.com>
 
        PR 27218

diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 9719341c5462167523956d2f61e64b2ec0e7f8db..9faf80f16298db4c392681c3b840f1d367f72743 100644 (file)
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -4184,7 +4184,8 @@ md_assemble (char *str)
 
   /* The prefix part of an 8-byte instruction always occupies the lower
      addressed word in a doubleword, regardless of endianness.  */
-  if (!target_big_endian && insn_length == 8)
+  if (insn_length == 8
+      && (sizeof (insn) > sizeof (valueT) || !target_big_endian))
     {
       md_number_to_chars (f, PPC_GET_PREFIX (insn), 4);
       md_number_to_chars (f + 4, PPC_GET_SUFFIX (insn), 4);