]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: bcm2712: PL011 UARTs are actually r1p5
authorPhil Elwell <phil@raspberrypi.com>
Sun, 23 Feb 2025 12:56:14 +0000 (13:56 +0100)
committerFlorian Fainelli <florian.fainelli@broadcom.com>
Tue, 25 Feb 2025 19:23:49 +0000 (11:23 -0800)
The ARM PL011 UART instances in BCM2712 are r1p5 spec, which means they
have 32-entry FIFOs. The correct periphid value for this is 0x00341011.
Thanks to N Buchwitz for pointing this out.

Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Signed-off-by: Stefan Wahren <wahrenst@gmx.net>
Link: https://lore.kernel.org/r/20250223125614.3592-3-wahrenst@gmx.net
Fixes: faa3381267d0 ("arm64: dts: broadcom: Add minimal support for Raspberry Pi 5")
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
arch/arm64/boot/dts/broadcom/bcm2712.dtsi

index 689c82b7f596ac6fd9bccd511c2dcce7c735be9e..9e610a89a3378e79250309f006d876cc26644ce6 100644 (file)
                        interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clk_uart>, <&clk_vpu>;
                        clock-names = "uartclk", "apb_pclk";
-                       arm,primecell-periphid = <0x00241011>;
+                       arm,primecell-periphid = <0x00341011>;
                        status = "disabled";
                };