]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
MAINTAINERS: add tree to RISC-V Microchip entry
authorConor Dooley <conor.dooley@microchip.com>
Sun, 23 Nov 2025 18:53:42 +0000 (18:53 +0000)
committerConor Dooley <conor.dooley@microchip.com>
Tue, 25 Nov 2025 22:12:59 +0000 (22:12 +0000)
In fairness to my own employer, lumping it in as "misc" is not quite
accurate when they do pay me to look after the platform. Move the tree
link for it to its entry, rather than having the RISC-V MISC SOC SUPPORT
entry cover it.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
MAINTAINERS

index 7309a0c685351606dec9e8c62c3562d312cf134a..4981224985b4f41a646361ed42eee2254ae9fe89 100644 (file)
@@ -22084,6 +22084,7 @@ M:      Conor Dooley <conor.dooley@microchip.com>
 M:     Daire McNamara <daire.mcnamara@microchip.com>
 L:     linux-riscv@lists.infradead.org
 S:     Supported
+T:     git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ (dts, soc, firmware)
 F:     Documentation/devicetree/bindings/clock/microchip,mpfs*.yaml
 F:     Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml
 F:     Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml
@@ -22117,7 +22118,6 @@ L:      linux-riscv@lists.infradead.org
 S:     Maintained
 T:     git https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/
 F:     arch/riscv/boot/dts/canaan/
-F:     arch/riscv/boot/dts/microchip/
 F:     arch/riscv/boot/dts/sifive/
 
 RISC-V PMU DRIVERS