--- /dev/null
+From 58dd4385577ed7969b80cdc9e2a31575aba6c712 Mon Sep 17 00:00:00 2001
+From: Jeff Layton <jlayton@kernel.org>
+Date: Fri, 3 Jun 2022 16:39:57 -0400
+Subject: ceph: don't leak snap_rwsem in handle_cap_grant
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Jeff Layton <jlayton@kernel.org>
+
+commit 58dd4385577ed7969b80cdc9e2a31575aba6c712 upstream.
+
+When handle_cap_grant is called on an IMPORT op, then the snap_rwsem is
+held and the function is expected to release it before returning. It
+currently fails to do that in all cases which could lead to a deadlock.
+
+Fixes: 6f05b30ea063 ("ceph: reset i_requested_max_size if file write is not wanted")
+Link: https://tracker.ceph.com/issues/55857
+Signed-off-by: Jeff Layton <jlayton@kernel.org>
+Reviewed-by: Luís Henriques <lhenriques@suse.de>
+Signed-off-by: Ilya Dryomov <idryomov@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ fs/ceph/caps.c | 27 +++++++++++++--------------
+ 1 file changed, 13 insertions(+), 14 deletions(-)
+
+--- a/fs/ceph/caps.c
++++ b/fs/ceph/caps.c
+@@ -3578,24 +3578,23 @@ static void handle_cap_grant(struct inod
+ fill_inline = true;
+ }
+
+- if (ci->i_auth_cap == cap &&
+- le32_to_cpu(grant->op) == CEPH_CAP_OP_IMPORT) {
+- if (newcaps & ~extra_info->issued)
+- wake = true;
++ if (le32_to_cpu(grant->op) == CEPH_CAP_OP_IMPORT) {
++ if (ci->i_auth_cap == cap) {
++ if (newcaps & ~extra_info->issued)
++ wake = true;
+
+- if (ci->i_requested_max_size > max_size ||
+- !(le32_to_cpu(grant->wanted) & CEPH_CAP_ANY_FILE_WR)) {
+- /* re-request max_size if necessary */
+- ci->i_requested_max_size = 0;
+- wake = true;
+- }
++ if (ci->i_requested_max_size > max_size ||
++ !(le32_to_cpu(grant->wanted) & CEPH_CAP_ANY_FILE_WR)) {
++ /* re-request max_size if necessary */
++ ci->i_requested_max_size = 0;
++ wake = true;
++ }
+
+- ceph_kick_flushing_inode_caps(session, ci);
+- spin_unlock(&ci->i_ceph_lock);
++ ceph_kick_flushing_inode_caps(session, ci);
++ }
+ up_read(&session->s_mdsc->snap_rwsem);
+- } else {
+- spin_unlock(&ci->i_ceph_lock);
+ }
++ spin_unlock(&ci->i_ceph_lock);
+
+ if (fill_inline)
+ ceph_fill_inline_data(inode, NULL, extra_info->inline_data,
--- /dev/null
+From fea013e020e6ecc7be75bea0d61697b7e916b44d Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Lu=C3=ADs=20Henriques?= <lhenriques@suse.de>
+Date: Tue, 24 May 2022 17:06:27 +0100
+Subject: ceph: use correct index when encoding client supported features
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Luís Henriques <lhenriques@suse.de>
+
+commit fea013e020e6ecc7be75bea0d61697b7e916b44d upstream.
+
+Feature bits have to be encoded into the correct locations. This hasn't
+been an issue so far because the only hole in the feature bits was in bit
+10 (CEPHFS_FEATURE_RECLAIM_CLIENT), which is located in the 2nd byte. When
+adding more bits that go beyond the this 2nd byte, the bug will show up.
+
+[xiubli: remove incorrect comment for CEPHFS_FEATURES_CLIENT_SUPPORTED]
+
+Fixes: 9ba1e224538a ("ceph: allocate the correct amount of extra bytes for the session features")
+Signed-off-by: Luís Henriques <lhenriques@suse.de>
+Reviewed-by: Jeff Layton <jlayton@kernel.org>
+Signed-off-by: Xiubo Li <xiubli@redhat.com>
+Signed-off-by: Ilya Dryomov <idryomov@gmail.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ fs/ceph/mds_client.c | 7 +++++--
+ fs/ceph/mds_client.h | 6 ------
+ 2 files changed, 5 insertions(+), 8 deletions(-)
+
+--- a/fs/ceph/mds_client.c
++++ b/fs/ceph/mds_client.c
+@@ -1220,14 +1220,17 @@ static int encode_supported_features(voi
+ if (count > 0) {
+ size_t i;
+ size_t size = FEATURE_BYTES(count);
++ unsigned long bit;
+
+ if (WARN_ON_ONCE(*p + 4 + size > end))
+ return -ERANGE;
+
+ ceph_encode_32(p, size);
+ memset(*p, 0, size);
+- for (i = 0; i < count; i++)
+- ((unsigned char*)(*p))[i / 8] |= BIT(feature_bits[i] % 8);
++ for (i = 0; i < count; i++) {
++ bit = feature_bits[i];
++ ((unsigned char *)(*p))[bit / 8] |= BIT(bit % 8);
++ }
+ *p += size;
+ } else {
+ if (WARN_ON_ONCE(*p + 4 > end))
+--- a/fs/ceph/mds_client.h
++++ b/fs/ceph/mds_client.h
+@@ -33,10 +33,6 @@ enum ceph_feature_type {
+ CEPHFS_FEATURE_MAX = CEPHFS_FEATURE_METRIC_COLLECT,
+ };
+
+-/*
+- * This will always have the highest feature bit value
+- * as the last element of the array.
+- */
+ #define CEPHFS_FEATURES_CLIENT_SUPPORTED { \
+ 0, 1, 2, 3, 4, 5, 6, 7, \
+ CEPHFS_FEATURE_MIMIC, \
+@@ -45,8 +41,6 @@ enum ceph_feature_type {
+ CEPHFS_FEATURE_MULTI_RECONNECT, \
+ CEPHFS_FEATURE_DELEG_INO, \
+ CEPHFS_FEATURE_METRIC_COLLECT, \
+- \
+- CEPHFS_FEATURE_MAX, \
+ }
+ #define CEPHFS_FEATURES_CLIENT_REQUIRED {}
+
--- /dev/null
+From ebb4f1eb9360036be5ea70de82c5703ca0e64d43 Mon Sep 17 00:00:00 2001
+From: Jacky Bai <ping.bai@nxp.com>
+Date: Thu, 9 Jun 2022 21:28:58 +0800
+Subject: clk: imx93: Correct the edma1's parent clock
+
+From: Jacky Bai <ping.bai@nxp.com>
+
+commit ebb4f1eb9360036be5ea70de82c5703ca0e64d43 upstream.
+
+For EDMA1 in AONMIX, its parent clock should be from cm33_root,
+so Correct it.
+
+Fixes: 24defbe194b65("clk: imx: add i.MX93 clk")
+Signed-off-by: Jacky Bai <ping.bai@nxp.com>
+Signed-off-by: Peng Fan <peng.fan@nxp.com>
+Reviewed-by: Peng Fan <peng.fan@nxp.com>
+Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
+Link: https://lore.kernel.org/r/20220609132902.3504651-4-peng.fan@oss.nxp.com
+Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/clk/imx/clk-imx93.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
+index 26885bd3971c..f5c9fa40491c 100644
+--- a/drivers/clk/imx/clk-imx93.c
++++ b/drivers/clk/imx/clk-imx93.c
+@@ -160,7 +160,7 @@ static const struct imx93_clk_ccgr {
+ { IMX93_CLK_SEMA2_GATE, "sema2", "bus_wakeup_root", 0x8480, },
+ { IMX93_CLK_MU_A_GATE, "mu_a", "bus_aon_root", 0x84c0, },
+ { IMX93_CLK_MU_B_GATE, "mu_b", "bus_aon_root", 0x8500, },
+- { IMX93_CLK_EDMA1_GATE, "edma1", "wakeup_axi_root", 0x8540, },
++ { IMX93_CLK_EDMA1_GATE, "edma1", "m33_root", 0x8540, },
+ { IMX93_CLK_EDMA2_GATE, "edma2", "wakeup_axi_root", 0x8580, },
+ { IMX93_CLK_FLEXSPI1_GATE, "flexspi", "flexspi_root", 0x8640, },
+ { IMX93_CLK_GPIO1_GATE, "gpio1", "m33_root", 0x8880, },
+--
+2.37.2
+
--- /dev/null
+From 25d203d0751ca191301bc578ba5d59fa401f1fbf Mon Sep 17 00:00:00 2001
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Date: Fri, 20 May 2022 14:32:45 +0200
+Subject: dt-bindings: arm: qcom: fix Longcheer L8150 compatibles
+
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+
+commit 25d203d0751ca191301bc578ba5d59fa401f1fbf upstream.
+
+The MSM8916 Longcheer L8150 uses a fallback in compatible:
+
+ msm8916-longcheer-l8150.dtb: /: compatible: 'oneOf' conditional failed, one must be fixed:
+ ['longcheer,l8150', 'qcom,msm8916-v1-qrd/9-v1', 'qcom,msm8916'] is too long
+
+Fixes: b72160fa886d ("dt-bindings: qcom: Document bindings for new MSM8916 devices")
+Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Acked-by: Rob Herring <robh@kernel.org>
+Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
+Link: https://lore.kernel.org/r/20220520123252.365762-2-krzysztof.kozlowski@linaro.org
+Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ Documentation/devicetree/bindings/arm/qcom.yaml | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/Documentation/devicetree/bindings/arm/qcom.yaml
++++ b/Documentation/devicetree/bindings/arm/qcom.yaml
+@@ -160,12 +160,16 @@ properties:
+ - items:
+ - enum:
+ - alcatel,idol347
+- - longcheer,l8150
+ - samsung,a3u-eur
+ - samsung,a5u-eur
+ - const: qcom,msm8916
+
+ - items:
++ - const: longcheer,l8150
++ - const: qcom,msm8916-v1-qrd/9-v1
++ - const: qcom,msm8916
++
++ - items:
+ - enum:
+ - sony,karin_windy
+ - sony,karin-row
--- /dev/null
+From bb35fe1efbae4114bd288fae0f56070f563adcfc Mon Sep 17 00:00:00 2001
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Date: Fri, 20 May 2022 14:32:46 +0200
+Subject: dt-bindings: arm: qcom: fix MSM8916 MTP compatibles
+
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+
+commit bb35fe1efbae4114bd288fae0f56070f563adcfc upstream.
+
+The order of compatibles for MSM8916 MTP board is different:
+
+ msm8916-mtp.dtb: /: compatible: 'oneOf' conditional failed, one must be fixed:
+ ['qcom,msm8916-mtp', 'qcom,msm8916-mtp/1', 'qcom,msm8916'] is too long
+
+Fixes: 9d3ef77fe568 ("dt-bindings: arm: Convert QCom board/soc bindings to json-schema")
+Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Acked-by: Rob Herring <robh@kernel.org>
+Link: https://lore.kernel.org/r/20220520123252.365762-3-krzysztof.kozlowski@linaro.org
+Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ Documentation/devicetree/bindings/arm/qcom.yaml | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/Documentation/devicetree/bindings/arm/qcom.yaml
++++ b/Documentation/devicetree/bindings/arm/qcom.yaml
+@@ -153,8 +153,8 @@ properties:
+ - const: qcom,msm8974
+
+ - items:
+- - const: qcom,msm8916-mtp/1
+ - const: qcom,msm8916-mtp
++ - const: qcom,msm8916-mtp/1
+ - const: qcom,msm8916
+
+ - items:
--- /dev/null
+From c704bd373f58a84193eebe40bd271d6b73c138b0 Mon Sep 17 00:00:00 2001
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Date: Fri, 20 May 2022 14:32:47 +0200
+Subject: dt-bindings: arm: qcom: fix MSM8994 boards compatibles
+
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+
+commit c704bd373f58a84193eebe40bd271d6b73c138b0 upstream.
+
+The compatibles for APQ8094/MSM8994 boards are different than specified
+in bindings. None of them use fallback to other SoC variant.
+
+Fixes: 9ad3c08f6f1b ("dt-bindings: arm: qcom: Document sony boards for apq8094")
+Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Acked-by: Rob Herring <robh@kernel.org>
+Link: https://lore.kernel.org/r/20220520123252.365762-4-krzysztof.kozlowski@linaro.org
+Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/Documentation/devicetree/bindings/arm/qcom.yaml
++++ b/Documentation/devicetree/bindings/arm/qcom.yaml
+@@ -172,12 +172,15 @@ properties:
+ - items:
+ - enum:
+ - sony,karin_windy
++ - const: qcom,apq8094
++
++ - items:
++ - enum:
+ - sony,karin-row
+ - sony,satsuki-row
+ - sony,sumire-row
+ - sony,suzuran-row
+- - qcom,msm8994
+- - const: qcom,apq8094
++ - const: qcom,msm8994
+
+ - items:
+ - enum:
--- /dev/null
+From 2b4e75a7a7c8d3531a40ebb103b92f88ff693f79 Mon Sep 17 00:00:00 2001
+From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Date: Mon, 20 Jun 2022 10:19:33 +0300
+Subject: dt-bindings: clock: qcom,gcc-msm8996: add more GCC clock sources
+
+From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+
+commit 2b4e75a7a7c8d3531a40ebb103b92f88ff693f79 upstream.
+
+Add additional GCC clock sources. This includes PCIe and USB PIPE and
+UFS symbol clocks.
+
+Fixes: 2a8aa18c1131 ("dt-bindings: clk: qcom: Fix self-validation, split, and clean cruft")
+Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+Link: https://lore.kernel.org/r/20220620071936.1558906-2-dmitry.baryshkov@linaro.org
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml | 16 ++++++++++
+ 1 file changed, 16 insertions(+)
+
+--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml
++++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml
+@@ -22,16 +22,32 @@ properties:
+ const: qcom,gcc-msm8996
+
+ clocks:
++ minItems: 3
+ items:
+ - description: XO source
+ - description: Second XO source
+ - description: Sleep clock source
++ - description: PCIe 0 PIPE clock (optional)
++ - description: PCIe 1 PIPE clock (optional)
++ - description: PCIe 2 PIPE clock (optional)
++ - description: USB3 PIPE clock (optional)
++ - description: UFS RX symbol 0 clock (optional)
++ - description: UFS RX symbol 1 clock (optional)
++ - description: UFS TX symbol 0 clock (optional)
+
+ clock-names:
++ minItems: 3
+ items:
+ - const: cxo
+ - const: cxo2
+ - const: sleep_clk
++ - const: pcie_0_pipe_clk_src
++ - const: pcie_1_pipe_clk_src
++ - const: pcie_2_pipe_clk_src
++ - const: usb3_phy_pipe_clk_src
++ - const: ufs_rx_symbol_0_clk_src
++ - const: ufs_rx_symbol_1_clk_src
++ - const: ufs_tx_symbol_0_clk_src
+
+ '#clock-cells':
+ const: 1
--- /dev/null
+From 7668048e5c697a9493ffc0e6001c322b2efe90ae Mon Sep 17 00:00:00 2001
+From: Michal Simek <michal.simek@xilinx.com>
+Date: Thu, 14 Oct 2021 12:14:18 +0200
+Subject: dt-bindings: gpio: zynq: Add missing compatible strings
+
+From: Michal Simek <michal.simek@xilinx.com>
+
+commit 7668048e5c697a9493ffc0e6001c322b2efe90ae upstream.
+
+"xlnx,zynqmp-gpio-1.0", "xlnx,versal-gpio-1.0" and "xlnx,pmc-gpio-1.0"
+compatible strings were not moved to yaml format. But they were in origin
+text file.
+
+Fixes: 45ca16072b70 ("dt-bindings: gpio: zynq: convert bindings to YAML")
+Signed-off-by: Michal Simek <michal.simek@xilinx.com>
+Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
+Acked-by: Rob Herring <robh@kernel.org>
+Link: https://lore.kernel.org/r/72c973da5670b5ae81d050c582948894ee4174f8.1634206453.git.michal.simek@xilinx.com
+Signed-off-by: Michal Simek <michal.simek@amd.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ Documentation/devicetree/bindings/gpio/gpio-zynq.yaml | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml
++++ b/Documentation/devicetree/bindings/gpio/gpio-zynq.yaml
+@@ -11,7 +11,11 @@ maintainers:
+
+ properties:
+ compatible:
+- const: xlnx,zynq-gpio-1.0
++ enum:
++ - xlnx,zynq-gpio-1.0
++ - xlnx,zynqmp-gpio-1.0
++ - xlnx,versal-gpio-1.0
++ - xlnx,pmc-gpio-1.0
+
+ reg:
+ maxItems: 1
--- /dev/null
+From 3b4916a6e422394aa129fe9b204f4d489ae484a6 Mon Sep 17 00:00:00 2001
+From: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
+Date: Fri, 8 Jul 2022 13:11:54 +0100
+Subject: dt-bindings: opp: opp-v2-kryo-cpu: Fix example binding checks
+
+From: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
+
+commit 3b4916a6e422394aa129fe9b204f4d489ae484a6 upstream.
+
+Adding missing compat entries to the cpufreq node
+Documentation/devicetree/bindings/cpufreq/qcom-cpufreq-nvmem.yaml shows up
+a dt_binding_check in this file.
+
+opp-v2-kryo-cpu.example.dtb: /: cpus:cpu@0: 'power-domains' is a required property
+opp-v2-kryo-cpu.example.dtb: /: cpus:cpu@0: 'power-domain-names' is a required property
+opp-v2-kryo-cpu.example.dtb: /: opp-table-0:opp-307200000: 'required-opps' is a required property
+
+Fixes: ec24d1d55469 ("dt-bindings: opp: Convert qcom-nvmem-cpufreq to DT schema")
+Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
+Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ .../devicetree/bindings/opp/opp-v2-kryo-cpu.yaml | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+diff --git a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
+index 30f7b596d609..59663e897dae 100644
+--- a/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
++++ b/Documentation/devicetree/bindings/opp/opp-v2-kryo-cpu.yaml
+@@ -98,6 +98,8 @@ examples:
+ capacity-dmips-mhz = <1024>;
+ clocks = <&kryocc 0>;
+ operating-points-v2 = <&cluster0_opp>;
++ power-domains = <&cpr>;
++ power-domain-names = "cpr";
+ #cooling-cells = <2>;
+ next-level-cache = <&L2_0>;
+ L2_0: l2-cache {
+@@ -115,6 +117,8 @@ examples:
+ capacity-dmips-mhz = <1024>;
+ clocks = <&kryocc 0>;
+ operating-points-v2 = <&cluster0_opp>;
++ power-domains = <&cpr>;
++ power-domain-names = "cpr";
+ #cooling-cells = <2>;
+ next-level-cache = <&L2_0>;
+ };
+@@ -128,6 +132,8 @@ examples:
+ capacity-dmips-mhz = <1024>;
+ clocks = <&kryocc 1>;
+ operating-points-v2 = <&cluster1_opp>;
++ power-domains = <&cpr>;
++ power-domain-names = "cpr";
+ #cooling-cells = <2>;
+ next-level-cache = <&L2_1>;
+ L2_1: l2-cache {
+@@ -145,6 +151,8 @@ examples:
+ capacity-dmips-mhz = <1024>;
+ clocks = <&kryocc 1>;
+ operating-points-v2 = <&cluster1_opp>;
++ power-domains = <&cpr>;
++ power-domain-names = "cpr";
+ #cooling-cells = <2>;
+ next-level-cache = <&L2_1>;
+ };
+@@ -182,18 +190,21 @@ examples:
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
++ required-opps = <&cpr_opp1>;
+ };
+ opp-1401600000 {
+ opp-hz = /bits/ 64 <1401600000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x5>;
+ clock-latency-ns = <200000>;
++ required-opps = <&cpr_opp2>;
+ };
+ opp-1593600000 {
+ opp-hz = /bits/ 64 <1593600000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <200000>;
++ required-opps = <&cpr_opp3>;
+ };
+ };
+
+@@ -207,24 +218,28 @@ examples:
+ opp-microvolt = <905000 905000 1140000>;
+ opp-supported-hw = <0x7>;
+ clock-latency-ns = <200000>;
++ required-opps = <&cpr_opp1>;
+ };
+ opp-1804800000 {
+ opp-hz = /bits/ 64 <1804800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x6>;
+ clock-latency-ns = <200000>;
++ required-opps = <&cpr_opp4>;
+ };
+ opp-1900800000 {
+ opp-hz = /bits/ 64 <1900800000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x4>;
+ clock-latency-ns = <200000>;
++ required-opps = <&cpr_opp5>;
+ };
+ opp-2150400000 {
+ opp-hz = /bits/ 64 <2150400000>;
+ opp-microvolt = <1140000 905000 1140000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <200000>;
++ required-opps = <&cpr_opp6>;
+ };
+ };
+
+--
+2.37.2
+
--- /dev/null
+From 839fbdee4c080eb95567cbcf6366072a56d3a3cc Mon Sep 17 00:00:00 2001
+From: Johan Hovold <johan+linaro@kernel.org>
+Date: Wed, 29 Jun 2022 16:09:51 +0200
+Subject: dt-bindings: PCI: qcom: Fix reset conditional
+
+From: Johan Hovold <johan+linaro@kernel.org>
+
+commit 839fbdee4c080eb95567cbcf6366072a56d3a3cc upstream.
+
+Fix the reset conditional which always evaluated to true due to a
+misspelled property name ("compatibles" in plural).
+
+Fixes: 6700a9b00f0a ("dt-bindings: PCI: qcom: Do not require resets on msm8996 platforms")
+Link: https://lore.kernel.org/r/20220629141000.18111-2-johan+linaro@kernel.org
+Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
+Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
+Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+index c40ba753707c..92402f1d3fda 100644
+--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
++++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+@@ -614,7 +614,7 @@ allOf:
+ - if:
+ not:
+ properties:
+- compatibles:
++ compatible:
+ contains:
+ enum:
+ - qcom,pcie-msm8996
+--
+2.37.2
+
--- /dev/null
+From aac289653fa5adf9e9985e4912c1d24a3e8cbab2 Mon Sep 17 00:00:00 2001
+From: Ondrej Mosnacek <omosnace@redhat.com>
+Date: Mon, 11 Jul 2022 14:09:23 +0200
+Subject: kbuild: dummy-tools: avoid tmpdir leak in dummy gcc
+
+From: Ondrej Mosnacek <omosnace@redhat.com>
+
+commit aac289653fa5adf9e9985e4912c1d24a3e8cbab2 upstream.
+
+When passed -print-file-name=plugin, the dummy gcc script creates a
+temporary directory that is never cleaned up. To avoid cluttering
+$TMPDIR, instead use a static directory included in the source tree.
+
+Fixes: 76426e238834 ("kbuild: add dummy toolchains to enable all cc-option etc. in Kconfig")
+Signed-off-by: Ondrej Mosnacek <omosnace@redhat.com>
+Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ .../dummy-tools/dummy-plugin-dir/include/plugin-version.h | 0
+ scripts/dummy-tools/gcc | 8 ++------
+ 1 file changed, 2 insertions(+), 6 deletions(-)
+ create mode 100644 scripts/dummy-tools/dummy-plugin-dir/include/plugin-version.h
+
+--- a/scripts/dummy-tools/gcc
++++ b/scripts/dummy-tools/gcc
+@@ -96,12 +96,8 @@ fi
+
+ # To set GCC_PLUGINS
+ if arg_contain -print-file-name=plugin "$@"; then
+- plugin_dir=$(mktemp -d)
+-
+- mkdir -p $plugin_dir/include
+- touch $plugin_dir/include/plugin-version.h
+-
+- echo $plugin_dir
++ # Use $0 to find the in-tree dummy directory
++ echo "$(dirname "$(readlink -f "$0")")/dummy-plugin-dir"
+ exit 0
+ fi
+
plip-avoid-rcu-debug-splat.patch
vsock-fix-memory-leak-in-vsock_connect.patch
vsock-set-socket-state-back-to-ss_unconnected-in-vsock_connect_timeout.patch
+dt-bindings-gpio-zynq-add-missing-compatible-strings.patch
+dt-bindings-arm-qcom-fix-longcheer-l8150-compatibles.patch
+dt-bindings-arm-qcom-fix-msm8916-mtp-compatibles.patch
+dt-bindings-arm-qcom-fix-msm8994-boards-compatibles.patch
+dt-bindings-clock-qcom-gcc-msm8996-add-more-gcc-clock-sources.patch
+dt-bindings-pci-qcom-fix-reset-conditional.patch
+spi-dt-bindings-cadence-add-missing-required.patch
+spi-dt-bindings-zynqmp-qspi-add-missing-required.patch
+dt-bindings-opp-opp-v2-kryo-cpu-fix-example-binding-checks.patch
+spi-dt-bindings-qcom-spi-geni-qcom-allow-three-interconnects.patch
+ceph-use-correct-index-when-encoding-client-supported-features.patch
+tools-testing-cxl-fix-decoder-default-state.patch
+tools-vm-slabinfo-use-alphabetic-order-when-two-values-are-equal.patch
+ceph-don-t-leak-snap_rwsem-in-handle_cap_grant.patch
+clk-imx93-correct-the-edma1-s-parent-clock.patch
+vdpa_sim-use-max_iotlb_entries-as-a-limit-in-vhost_iotlb_init.patch
+vdpa_sim_blk-set-number-of-address-spaces-and-virtqueue-groups.patch
+tools-testing-cxl-fix-cxl_hdm_decode_init-calling-convention.patch
+kbuild-dummy-tools-avoid-tmpdir-leak-in-dummy-gcc.patch
+tools-build-switch-to-new-openssl-api-for-test-libcrypto.patch
--- /dev/null
+From 6eee27c598fde65988723b785a9c9192d5ffb93a Mon Sep 17 00:00:00 2001
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Date: Mon, 4 Jul 2022 15:06:17 +0200
+Subject: spi: dt-bindings: cadence: add missing 'required'
+
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+
+commit 6eee27c598fde65988723b785a9c9192d5ffb93a upstream.
+
+During the conversion the bindings lost list of required properties.
+
+Fixes: aa7968682a2b ("spi: convert Cadence SPI bindings to YAML")
+Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Reviewed-by: Michal Simek <michal.simek@amd.com>
+Link: https://lore.kernel.org/r/20220704130618.199231-1-krzysztof.kozlowski@linaro.org
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ Documentation/devicetree/bindings/spi/spi-cadence.yaml | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/Documentation/devicetree/bindings/spi/spi-cadence.yaml
++++ b/Documentation/devicetree/bindings/spi/spi-cadence.yaml
+@@ -49,6 +49,13 @@ properties:
+ enum: [ 0, 1 ]
+ default: 0
+
++required:
++ - compatible
++ - reg
++ - interrupts
++ - clock-names
++ - clocks
++
+ unevaluatedProperties: false
+
+ examples:
--- /dev/null
+From ee912312db5a5e877120b9f519a034fc34315c9b Mon Sep 17 00:00:00 2001
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Date: Wed, 20 Jul 2022 18:38:41 +0200
+Subject: spi: dt-bindings: qcom,spi-geni-qcom: allow three interconnects
+
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+
+commit ee912312db5a5e877120b9f519a034fc34315c9b upstream.
+
+Recent Qualcomm Geni SPI nodes, e.g. on SM8450, come also with three
+interconnects. This fixes dtbs_check warnings like:
+
+ sm8450-qrd.dtb: spi@a98000: interconnects: [[46, 1, 0, 46, 4, 0], [47, 2, 0, 48, 12, 0], [49, 1, 0, 50, 1, 0]] is too long
+ sm8450-qrd.dtb: spi@a98000: interconnect-names: ['qup-core', 'qup-config', 'qup-memory'] is too long
+
+Fixes: 5bdcae1fe1c5 ("spi: dt-bindings: qcom,spi-geni-qcom: convert to dtschema")
+Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Link: https://lore.kernel.org/r/20220720163841.7283-1-krzysztof.kozlowski@linaro.org
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ .../devicetree/bindings/spi/qcom,spi-geni-qcom.yaml | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml
+index e2c7b934c50d..47e1b3ee8b1b 100644
+--- a/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml
++++ b/Documentation/devicetree/bindings/spi/qcom,spi-geni-qcom.yaml
+@@ -45,12 +45,15 @@ properties:
+ - const: rx
+
+ interconnects:
+- maxItems: 2
++ minItems: 2
++ maxItems: 3
+
+ interconnect-names:
++ minItems: 2
+ items:
+ - const: qup-core
+ - const: qup-config
++ - const: qup-memory
+
+ interrupts:
+ maxItems: 1
+--
+2.37.2
+
--- /dev/null
+From acfc34f008c3e66bbcb7b9162c80c8327b6e800f Mon Sep 17 00:00:00 2001
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Date: Mon, 4 Jul 2022 15:06:18 +0200
+Subject: spi: dt-bindings: zynqmp-qspi: add missing 'required'
+
+From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+
+commit acfc34f008c3e66bbcb7b9162c80c8327b6e800f upstream.
+
+During the conversion the bindings lost list of required properties.
+
+Fixes: c58db2abb19f ("spi: convert Xilinx Zynq UltraScale+ MPSoC GQSPI bindings to YAML")
+Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
+Reviewed-by: Michal Simek <michal.simek@amd.com>
+Link: https://lore.kernel.org/r/20220704130618.199231-2-krzysztof.kozlowski@linaro.org
+Signed-off-by: Mark Brown <broonie@kernel.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
++++ b/Documentation/devicetree/bindings/spi/spi-zynqmp-qspi.yaml
+@@ -30,6 +30,13 @@ properties:
+ clocks:
+ maxItems: 2
+
++required:
++ - compatible
++ - reg
++ - interrupts
++ - clock-names
++ - clocks
++
+ unevaluatedProperties: false
+
+ examples:
--- /dev/null
+From 5b245985a6de5ac18b5088c37068816d413fb8ed Mon Sep 17 00:00:00 2001
+From: Roberto Sassu <roberto.sassu@huawei.com>
+Date: Tue, 19 Jul 2022 19:05:55 +0200
+Subject: tools build: Switch to new openssl API for test-libcrypto
+
+From: Roberto Sassu <roberto.sassu@huawei.com>
+
+commit 5b245985a6de5ac18b5088c37068816d413fb8ed upstream.
+
+Switch to new EVP API for detecting libcrypto, as Fedora 36 returns an
+error when it encounters the deprecated function MD5_Init() and the others.
+
+The error would be interpreted as missing libcrypto, while in reality it is
+not.
+
+Fixes: 6e8ccb4f624a73c5 ("tools/bpf: properly account for libbfd variations")
+Signed-off-by: Roberto Sassu <roberto.sassu@huawei.com>
+Cc: Alexei Starovoitov <ast@kernel.org>
+Cc: Andrii Nakryiko <andrii@kernel.org>
+Cc: bpf@vger.kernel.org
+Cc: Daniel Borkmann <daniel@iogearbox.net>
+Cc: Ingo Molnar <mingo@redhat.com>
+Cc: John Fastabend <john.fastabend@gmail.com>
+Cc: KP Singh <kpsingh@kernel.org>
+Cc: llvm@lists.linux.dev
+Cc: Martin KaFai Lau <martin.lau@linux.dev>
+Cc: Nathan Chancellor <nathan@kernel.org>
+Cc: Nick Desaulniers <ndesaulniers@google.com>
+Cc: Nick Terrell <terrelln@fb.com>
+Cc: Peter Zijlstra <peterz@infradead.org>
+Cc: Quentin Monnet <quentin@isovalent.com>
+Cc: Song Liu <song@kernel.org>
+Cc: Stanislav Fomichev <sdf@google.com>
+Link: https://lore.kernel.org/r/20220719170555.2576993-4-roberto.sassu@huawei.com
+Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ tools/build/feature/test-libcrypto.c | 15 +++++++++++----
+ 1 file changed, 11 insertions(+), 4 deletions(-)
+
+--- a/tools/build/feature/test-libcrypto.c
++++ b/tools/build/feature/test-libcrypto.c
+@@ -1,16 +1,23 @@
+ // SPDX-License-Identifier: GPL-2.0
++#include <openssl/evp.h>
+ #include <openssl/sha.h>
+ #include <openssl/md5.h>
+
+ int main(void)
+ {
+- MD5_CTX context;
++ EVP_MD_CTX *mdctx;
+ unsigned char md[MD5_DIGEST_LENGTH + SHA_DIGEST_LENGTH];
+ unsigned char dat[] = "12345";
++ unsigned int digest_len;
+
+- MD5_Init(&context);
+- MD5_Update(&context, &dat[0], sizeof(dat));
+- MD5_Final(&md[0], &context);
++ mdctx = EVP_MD_CTX_new();
++ if (!mdctx)
++ return 0;
++
++ EVP_DigestInit_ex(mdctx, EVP_md5(), NULL);
++ EVP_DigestUpdate(mdctx, &dat[0], sizeof(dat));
++ EVP_DigestFinal_ex(mdctx, &md[0], &digest_len);
++ EVP_MD_CTX_free(mdctx);
+
+ SHA1(&dat[0], sizeof(dat), &md[0]);
+
--- /dev/null
+From 863fdccdc5ed1e187a30a4a103340be4569904c8 Mon Sep 17 00:00:00 2001
+From: Dan Williams <dan.j.williams@intel.com>
+Date: Wed, 22 Jun 2022 01:00:45 -0700
+Subject: tools/testing/cxl: Fix cxl_hdm_decode_init() calling convention
+
+From: Dan Williams <dan.j.williams@intel.com>
+
+commit 863fdccdc5ed1e187a30a4a103340be4569904c8 upstream.
+
+This failing signature:
+
+[ 8.392669] cxl_bus_probe: cxl_port endpoint2: probe: 970997760
+[ 8.392670] cxl_port: probe of endpoint2 failed with error 970997760
+[ 8.392719] create_endpoint: cxl_mem mem0: add: endpoint2
+[ 8.392721] cxl_mem mem0: endpoint2 failed probe
+[ 8.392725] cxl_bus_probe: cxl_mem mem0: probe: -6
+
+...shows cxl_hdm_decode_init() resulting in a return code ("970997760")
+that looks like stack corruption. The problem goes away if
+cxl_hdm_decode_init() is not mocked via __wrap_cxl_hdm_decode_init().
+
+The corruption results from the mismatch that the calling convention for
+cxl_hdm_decode_init() is:
+
+int cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm)
+
+...and __wrap_cxl_hdm_decode_init() is:
+
+bool __wrap_cxl_hdm_decode_init(struct cxl_dev_state *cxlds, struct cxl_hdm *cxlhdm)
+
+...i.e. an int is expected but __wrap_hdm_decode_init() returns bool.
+
+Fix the convention and cleanup the organization to match
+__wrap_cxl_await_media_ready() as the difference was a red herring that
+distracted from finding the bug.
+
+Fixes: 92804edb11f0 ("cxl/pci: Drop @info argument to cxl_hdm_decode_init()")
+Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Reviewed-by: Adam Manzanares <a.manzanares@samsung.com>
+Link: https://lore.kernel.org/r/165603870776.551046.8709990108936497723.stgit@dwillia2-xfh
+Signed-off-by: Dan Williams <dan.j.williams@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ tools/testing/cxl/test/mock.c | 8 +++++---
+ 1 file changed, 5 insertions(+), 3 deletions(-)
+
+diff --git a/tools/testing/cxl/test/mock.c b/tools/testing/cxl/test/mock.c
+index f1f8c40948c5..bce6a21df0d5 100644
+--- a/tools/testing/cxl/test/mock.c
++++ b/tools/testing/cxl/test/mock.c
+@@ -208,13 +208,15 @@ int __wrap_cxl_await_media_ready(struct cxl_dev_state *cxlds)
+ }
+ EXPORT_SYMBOL_NS_GPL(__wrap_cxl_await_media_ready, CXL);
+
+-bool __wrap_cxl_hdm_decode_init(struct cxl_dev_state *cxlds,
+- struct cxl_hdm *cxlhdm)
++int __wrap_cxl_hdm_decode_init(struct cxl_dev_state *cxlds,
++ struct cxl_hdm *cxlhdm)
+ {
+ int rc = 0, index;
+ struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
+
+- if (!ops || !ops->is_mock_dev(cxlds->dev))
++ if (ops && ops->is_mock_dev(cxlds->dev))
++ rc = 0;
++ else
+ rc = cxl_hdm_decode_init(cxlds, cxlhdm);
+ put_cxl_mock_ops(index);
+
+--
+2.37.2
+
--- /dev/null
+From 08f8d040a11d539481b9aee7b482430561281a28 Mon Sep 17 00:00:00 2001
+From: Dan Williams <dan.j.williams@intel.com>
+Date: Tue, 24 May 2022 10:48:59 -0700
+Subject: tools/testing/cxl: Fix decoder default state
+
+From: Dan Williams <dan.j.williams@intel.com>
+
+commit 08f8d040a11d539481b9aee7b482430561281a28 upstream.
+
+The 'enabled' state is reserved for committed decoders. By default,
+cxl_test decoders are uncommitted at init time.
+
+Fixes: 7c7d68db0254 ("tools/testing/cxl: Enumerate mock decoders")
+Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
+Link: https://lore.kernel.org/r/165603888091.551046.6312322707378021172.stgit@dwillia2-xfh
+Signed-off-by: Dan Williams <dan.j.williams@intel.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ tools/testing/cxl/test/cxl.c | 1 -
+ 1 file changed, 1 deletion(-)
+
+diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
+index 91444279f9a2..6e086fbc5c5b 100644
+--- a/tools/testing/cxl/test/cxl.c
++++ b/tools/testing/cxl/test/cxl.c
+@@ -466,7 +466,6 @@ static int mock_cxl_enumerate_decoders(struct cxl_hdm *cxlhdm)
+ .end = -1,
+ };
+
+- cxld->flags = CXL_DECODER_F_ENABLE;
+ cxld->interleave_ways = min_not_zero(target_count, 1);
+ cxld->interleave_granularity = SZ_4K;
+ cxld->target_type = CXL_DECODER_EXPANDER;
+--
+2.37.2
+
--- /dev/null
+From 4f5ceb8851f0081af54313abbf56de1615911faf Mon Sep 17 00:00:00 2001
+From: Yuanzheng Song <songyuanzheng@huawei.com>
+Date: Sat, 28 May 2022 06:31:17 +0000
+Subject: tools/vm/slabinfo: use alphabetic order when two values are equal
+
+From: Yuanzheng Song <songyuanzheng@huawei.com>
+
+commit 4f5ceb8851f0081af54313abbf56de1615911faf upstream.
+
+When the number of partial slabs in each cache is the same (e.g., the
+value are 0), the results of the `slabinfo -X -N5` and `slabinfo -P -N5`
+are different.
+
+/ # slabinfo -X -N5
+...
+Slabs sorted by number of partial slabs
+---------------------------------------
+Name Objects Objsize Space Slabs/Part/Cpu O/S O %Fr %Ef Flg
+inode_cache 15180 392 6217728 758/0/1 20 1 0 95 a
+kernfs_node_cache 22494 88 2002944 488/0/1 46 0 0 98
+shmem_inode_cache 663 464 319488 38/0/1 17 1 0 96
+biovec-max 50 3072 163840 4/0/1 10 3 0 93 A
+dentry 19050 136 2600960 633/0/2 30 0 0 99 a
+
+/ # slabinfo -P -N5
+Name Objects Objsize Space Slabs/Part/Cpu O/S O %Fr %Ef Flg
+bdev_cache 32 984 32.7K 1/0/1 16 2 0 96 Aa
+ext4_inode_cache 42 752 32.7K 1/0/1 21 2 0 96 a
+dentry 19050 136 2.6M 633/0/2 30 0 0 99 a
+TCPv6 17 1840 32.7K 0/0/1 17 3 0 95 A
+RAWv6 18 856 16.3K 0/0/1 18 2 0 94 A
+
+This problem is caused by the sort_slabs(). So let's use alphabetic order
+when two values are equal in the sort_slabs().
+
+By the way, the content of the `slabinfo -h` is not aligned because the
+
+`-P|--partial Sort by number of partial slabs`
+
+uses tabs instead of spaces. So let's use spaces instead of tabs to fix
+it.
+
+Link: https://lkml.kernel.org/r/20220528063117.935158-1-songyuanzheng@huawei.com
+Fixes: 1106b205a3fe ("tools/vm/slabinfo: add partial slab listing to -X")
+Signed-off-by: Yuanzheng Song <songyuanzheng@huawei.com>
+Cc: "Tobin C. Harding" <tobin@kernel.org>
+Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ tools/vm/slabinfo.c | 32 ++++++++++++++++++++++----------
+ 1 file changed, 22 insertions(+), 10 deletions(-)
+
+--- a/tools/vm/slabinfo.c
++++ b/tools/vm/slabinfo.c
+@@ -125,7 +125,7 @@ static void usage(void)
+ "-n|--numa Show NUMA information\n"
+ "-N|--lines=K Show the first K slabs\n"
+ "-o|--ops Show kmem_cache_ops\n"
+- "-P|--partial Sort by number of partial slabs\n"
++ "-P|--partial Sort by number of partial slabs\n"
+ "-r|--report Detailed report on single slabs\n"
+ "-s|--shrink Shrink slabs\n"
+ "-S|--Size Sort by size\n"
+@@ -1067,15 +1067,27 @@ static void sort_slabs(void)
+ for (s2 = s1 + 1; s2 < slabinfo + slabs; s2++) {
+ int result;
+
+- if (sort_size)
+- result = slab_size(s1) < slab_size(s2);
+- else if (sort_active)
+- result = slab_activity(s1) < slab_activity(s2);
+- else if (sort_loss)
+- result = slab_waste(s1) < slab_waste(s2);
+- else if (sort_partial)
+- result = s1->partial < s2->partial;
+- else
++ if (sort_size) {
++ if (slab_size(s1) == slab_size(s2))
++ result = strcasecmp(s1->name, s2->name);
++ else
++ result = slab_size(s1) < slab_size(s2);
++ } else if (sort_active) {
++ if (slab_activity(s1) == slab_activity(s2))
++ result = strcasecmp(s1->name, s2->name);
++ else
++ result = slab_activity(s1) < slab_activity(s2);
++ } else if (sort_loss) {
++ if (slab_waste(s1) == slab_waste(s2))
++ result = strcasecmp(s1->name, s2->name);
++ else
++ result = slab_waste(s1) < slab_waste(s2);
++ } else if (sort_partial) {
++ if (s1->partial == s2->partial)
++ result = strcasecmp(s1->name, s2->name);
++ else
++ result = s1->partial < s2->partial;
++ } else
+ result = strcasecmp(s1->name, s2->name);
+
+ if (show_inverted)
--- /dev/null
+From 67f8f10c0bd78c4a0f0e983e050ab90da015323b Mon Sep 17 00:00:00 2001
+From: Stefano Garzarella <sgarzare@redhat.com>
+Date: Tue, 21 Jun 2022 17:12:08 +0200
+Subject: vdpa_sim: use max_iotlb_entries as a limit in vhost_iotlb_init
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Stefano Garzarella <sgarzare@redhat.com>
+
+commit 67f8f10c0bd78c4a0f0e983e050ab90da015323b upstream.
+
+Commit bda324fd037a ("vdpasim: control virtqueue support") changed
+the allocation of iotlbs calling vhost_iotlb_init() for each address
+space, instead of vhost_iotlb_alloc().
+
+With this change we forgot to use the limit we had introduced with
+the `max_iotlb_entries` module parameter.
+
+Fixes: bda324fd037a ("vdpasim: control virtqueue support")
+Cc: gautam.dawar@xilinx.com
+Signed-off-by: Stefano Garzarella <sgarzare@redhat.com>
+Message-Id: <20220621151208.189959-1-sgarzare@redhat.com>
+Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
+Acked-by: Eugenio Pérez <eperezma@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/vdpa/vdpa_sim/vdpa_sim.c | 4 ++--
+ 1 file changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/vdpa/vdpa_sim/vdpa_sim.c b/drivers/vdpa/vdpa_sim/vdpa_sim.c
+index 0f2865899647..3e81532c01cb 100644
+--- a/drivers/vdpa/vdpa_sim/vdpa_sim.c
++++ b/drivers/vdpa/vdpa_sim/vdpa_sim.c
+@@ -33,7 +33,7 @@ MODULE_PARM_DESC(batch_mapping, "Batched mapping 1 -Enable; 0 - Disable");
+ static int max_iotlb_entries = 2048;
+ module_param(max_iotlb_entries, int, 0444);
+ MODULE_PARM_DESC(max_iotlb_entries,
+- "Maximum number of iotlb entries. 0 means unlimited. (default: 2048)");
++ "Maximum number of iotlb entries for each address space. 0 means unlimited. (default: 2048)");
+
+ #define VDPASIM_QUEUE_ALIGN PAGE_SIZE
+ #define VDPASIM_QUEUE_MAX 256
+@@ -291,7 +291,7 @@ struct vdpasim *vdpasim_create(struct vdpasim_dev_attr *dev_attr)
+ goto err_iommu;
+
+ for (i = 0; i < vdpasim->dev_attr.nas; i++)
+- vhost_iotlb_init(&vdpasim->iommu[i], 0, 0);
++ vhost_iotlb_init(&vdpasim->iommu[i], max_iotlb_entries, 0);
+
+ vdpasim->buffer = kvmalloc(dev_attr->buffer_size, GFP_KERNEL);
+ if (!vdpasim->buffer)
+--
+2.37.2
+
--- /dev/null
+From 19cd4a5471b8eaa4bd161b0fdb4567f2fc88d809 Mon Sep 17 00:00:00 2001
+From: Stefano Garzarella <sgarzare@redhat.com>
+Date: Tue, 21 Jun 2022 17:13:23 +0200
+Subject: vdpa_sim_blk: set number of address spaces and virtqueue groups
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+From: Stefano Garzarella <sgarzare@redhat.com>
+
+commit 19cd4a5471b8eaa4bd161b0fdb4567f2fc88d809 upstream.
+
+Commit bda324fd037a ("vdpasim: control virtqueue support") added two
+new fields (nas, ngroups) to vdpasim_dev_attr, but we forgot to
+initialize them for vdpa_sim_blk.
+
+When creating a new vdpa_sim_blk device this causes the kernel
+to panic in this way:
+ $ vdpa dev add mgmtdev vdpasim_blk name blk0
+ BUG: kernel NULL pointer dereference, address: 0000000000000030
+ ...
+ RIP: 0010:vhost_iotlb_add_range_ctx+0x41/0x220 [vhost_iotlb]
+ ...
+ Call Trace:
+ <TASK>
+ vhost_iotlb_add_range+0x11/0x800 [vhost_iotlb]
+ vdpasim_map_range+0x91/0xd0 [vdpa_sim]
+ vdpasim_alloc_coherent+0x56/0x90 [vdpa_sim]
+ ...
+
+This happens because vdpasim->iommu[0] is not initialized when
+dev_attr.nas is 0.
+
+Let's fix this issue by initializing both (nas, ngroups) to 1 for
+vdpa_sim_blk.
+
+Fixes: bda324fd037a ("vdpasim: control virtqueue support")
+Cc: gautam.dawar@xilinx.com
+Signed-off-by: Stefano Garzarella <sgarzare@redhat.com>
+Message-Id: <20220621151323.190431-1-sgarzare@redhat.com>
+Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
+Acked-by: Eugenio Pérez <eperezma@redhat.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/vdpa/vdpa_sim/vdpa_sim_blk.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/vdpa/vdpa_sim/vdpa_sim_blk.c
++++ b/drivers/vdpa/vdpa_sim/vdpa_sim_blk.c
+@@ -34,7 +34,11 @@
+ #define VDPASIM_BLK_CAPACITY 0x40000
+ #define VDPASIM_BLK_SIZE_MAX 0x1000
+ #define VDPASIM_BLK_SEG_MAX 32
++
++/* 1 virtqueue, 1 address space, 1 virtqueue group */
+ #define VDPASIM_BLK_VQ_NUM 1
++#define VDPASIM_BLK_AS_NUM 1
++#define VDPASIM_BLK_GROUP_NUM 1
+
+ static char vdpasim_blk_id[VIRTIO_BLK_ID_BYTES] = "vdpa_blk_sim";
+
+@@ -260,6 +264,8 @@ static int vdpasim_blk_dev_add(struct vd
+ dev_attr.id = VIRTIO_ID_BLOCK;
+ dev_attr.supported_features = VDPASIM_BLK_FEATURES;
+ dev_attr.nvqs = VDPASIM_BLK_VQ_NUM;
++ dev_attr.ngroups = VDPASIM_BLK_GROUP_NUM;
++ dev_attr.nas = VDPASIM_BLK_AS_NUM;
+ dev_attr.config_size = sizeof(struct virtio_blk_config);
+ dev_attr.get_config = vdpasim_blk_get_config;
+ dev_attr.work_fn = vdpasim_blk_work;
projects / thirdparty / kernel / stable-queue.git / commitdiff
