]> git.ipfire.org Git - thirdparty/glibc.git/commitdiff
Make power6 directives be gcc-only
authorStan Shebs <stanshebs@google.com>
Wed, 26 Sep 2018 20:47:46 +0000 (13:47 -0700)
committerFangrui Song <i@maskray.me>
Sat, 28 Aug 2021 00:23:13 +0000 (17:23 -0700)
sysdeps/powerpc/fpu/fenv_libc.h
sysdeps/powerpc/fpu/tst-setcontext-fpscr.c

index 4c19d12b0b31c1f99a9926110ce0d1fae6ebd4b0..609f65b0e9bee1143be5ea1685f102fad2604000 100644 (file)
@@ -35,13 +35,19 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
 #define fegetenv_register() \
         ({ fenv_t env; asm volatile ("mffs %0" : "=f" (env)); env; })
 
+#if defined __clang__
+#define MACHINE_POWER6
+#else
+#define MACHINE_POWER6 ".machine \"power6\""
+#endif
+
 /* Equivalent to fesetenv, but takes a fenv_t instead of a pointer.  */
 #define fesetenv_register(env) \
        do { \
          double d = (env); \
          if(GLRO(dl_hwcap) & PPC_FEATURE_HAS_DFP) \
            asm volatile (".machine push; " \
-                         ".machine \"power6\"; " \
+                         MACHINE_POWER6 "; " \
                          "mtfsf 0xff,%0,1,0; " \
                          ".machine pop" : : "f" (d)); \
          else \
@@ -57,7 +63,8 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
 #define relax_fenv_state() \
        do { \
           if (GLRO(dl_hwcap) & PPC_FEATURE_HAS_DFP) \
-            asm (".machine push; .machine \"power6\"; " \
+            asm (".machine push; " \
+                 MACHINE_POWER6 "; " \
                  "mtfsfi 7,0,1; .machine pop"); \
           asm ("mtfsfi 7,0"); \
        } while(0)
index c64ca88a85e83774a35de91c97bd5ceb6e225178..ad64eb8e220d16fdc6d8d1dd7e3d4410e73c628a 100644 (file)
@@ -104,6 +104,12 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__)));
     u.fpscr;                                                           \
   })
 
+#if defined __clang__
+#define MACHINE_POWER6
+#else
+#define MACHINE_POWER6 ".machine \"power6\""
+#endif
+
 /* We make sure to zero fp after we use it in order to prevent stale data
    in an fp register from making a test-case pass erroneously.  */
 # define _SET_DI_FPSCR(__fpscr)                                                \
@@ -113,7 +119,7 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__)));
     fr = u.d;                                                          \
     /* Set the entire 64-bit FPSCR.  */                                        \
     __asm__ (".machine push; "                                         \
-            ".machine \"power6\"; "                                    \
+            MACHINE_POWER6 "; "                                        \
             "mtfsf 255,%0,1,0; "                                       \
             ".machine pop" : : "f" (fr));                              \
     fr = 0.0;                                                          \